Datasheet

DP83630
www.ti.com SNLS335B –OCTOBER 2010–REVISED APRIL 2013
10.6.2 PTP Event Configuration Register (PTP_EVNT), Page 5
This register provides basic configuration for IEEE 1588 Events. To write configuration to an Event
Timestamp Unit, set the EVNT_WR bit along with the EVNT_SEL and other control information. To read
configuration from an Event Timestamp Unit, set the EVNT_SEL encoding to the Event desired, and set
the EVNT_WR bit to 0. The subsequent read of the PTP_EVNT register will return the configuration
information.
Table 10-53. PTP Event Configuration Register (PTP_EVNT), address 0x15
Bit Bit Name Default Description
15 RESERVED 0, RO Reserved: Writes ignored, Read as 0
14 EVNT_RISE 0, RW Event Rise Detect Enable:
Enable Detection of Rising edge on Event input.
13 EVNT_FALL 0, RW Event Fall Detect Enable:
Enable Detection of Falling edge on Event input.
12 EVNT_SINGLE 0, RW Single Event Capture: Setting this bit to a 1 will enable single event capture
operation. The EVNT_RISE and EVNT_FALL enables will be cleared upon a valid
event timestamp capture.
11:8 EVNT_GPIO 0000, RW Event GPIO Connection:
Setting this field to a non-zero value will connect the Event to the associated GPIO
pin. Valid settings for this field are 1 thru 12.
7:4 RESERVED 0000, RO Reserved: Writes ignored, Read as 0
3:1 EVNT_SEL 000, RW Event Select:
This field selects the Event Timestamp Unit for configuration read or write.
0 EVNT_WR 0, RW Event Configuration Write:
Setting this bit will generate a Configuration Write to the selected Event Timestamp
Unit.
10.6.3 PTP Transmit Configuration Register 0 (PTP_TXCFG0), Page 5
This register provides configuration for IEEE 1588 Transmit Timestamp operation.
Table 10-54. PTP Transmit Configuration Register 0 (PTP_TXCFG0), address 0x16
Bit Bit Name Default Description
15 SYNC_1STEP 0, RW Sync Message One-Step Enable:
Enable automatic insertion of timestamp into transmit Sync Messages. Device will
automatically parse message and insert the timestamp in the correct location. UPD
checksum and CRC fields will be regenerated.
14 RESERVED 0, RO Reserved: Writes ignored, Read as 0
13 DR_INSERT 0, RW Insert Delay_Req Timestamp in Delay_Resp:
If this bit is set to a 1, the device insert the timestamp for transmitted Delay_Req
messages into inbound Delay_Resp messages. The most recent timestamp will be
used for any inbound Delay_Resp message. The receive timestamp insertion logic
must be enabled through the PTP Receive Configuration Registers.
12 NTP_TS_EN 0, RW Enable Timestamping of NTP Packets:
If this bit is set to 0, the device will check the UDP protocol field for a PTP Event
message (value 319). If this bit is set to 1, the device will check the UDP protocol
field for an NTP message (value 123). This setting applies to the transmit and
receive packet parsing engines.
11 IGNORE_2STEP 0, RW Ignore Two_Step flag for One-Step operation:
If this bit is set to a 0, the device will not insert a timestamp if the Two_Step bit is set
in the flags field of the PTP header. If this bit is set to 1, the device will insert a
timestamp independent of the setting of the Two_Step flag.
10 CRC_1STEP 0, RW Disable checking of CRC for One-Step operation:
If this bit is set to a 0, the device will force a CRC error for One-Step operation if the
incoming frame has a CRC error. If this bit is set to a 1, the device will send the
One- Step frame with a valid CRC, even if the incoming CRC is invalid.
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