Datasheet

DP83620

SNLS339C –JANUARY 2011–REVISED APRIL 2013

www.ti.com

10.2.11 PHY Control Frames Configuration Register (PCFCR)

This register provides configuration for the PHY Control Frame mechanism for register access.

Table 10-26. PHY Control Frames Configuration Register (PCFCR), address 0x1F

Bit Bit Name Default Description

15 PCF_STS_ERR 0, RO/COR PHY Control Frame Error Detected:

Indicates an error was detected in a PCF Frame since the last read of

this register. This bit will be cleared on read.

14 PCF_STS_OK 0, RO/COR PHY Control Frame OK:

Indicates a PCF Frame has completed without error since the last read

of this register. This bit will be cleared on read.

13:9 RESERVED 00 000, RO Reserved: Writes ignored, read as 0

8 PCF_DA_SEL 0, RW Select MAC Destination Address for PHY Control Frames:

0 : Use MAC Address [08 00 17 0B 6B 0F]

1 : Use MAC Address [08 00 17 00 00 00]

The device will also recognize packets with the above address with the

Multicast bit set (i.e. 09 00 17 ...).

7:6 PCF_INT_CTL 00, RW PHY Control Frame Interrupt Control:

Setting either of these bits enables control and status of the PCF

Interrupt through the MISR Register (taking the place of the RHF

Interrupt).

00 = PCF Interrupts Disabled

x1 = Interrupt on PCF Frame OK

1x = Interrupt on PCF Frame Error

5 PCF_BC_DIS 0, RW PHY Control Frame Broadcast Disable:

By default, the device will accept broadcast PHY Control Frames which

have a PHY Address field of 0x1F. If this bit is set to a 1, the PHY

Control Frame must have a PHY Address field that exactly matches the

device PHY Address.

4:1 PCF_BUF 0 000, RW PHY Control Frame Buffer Size:

Determines the buffer size for transmit to allow PHY Control Frame

detection. All packets will be delayed as they pass through this buffer. If

set to 0, packets will not be delayed and PHY Control frames will be

truncated after the Destination Address field.

0 PCF_EN Strap, RW PHY Control Frame Enable:

Enables Register writes using PHY Control Frames.

Submit Documentation Feedback

Product Folder Links: DP83620