Datasheet

Data(J/K)IDLE
T2.9.2
T2.9.1
CRS/CRS_DV
PMD Input Pair
RXD[3:0]
RX_DV
RX_ER
10%
90%
+1 rise
+1 fall
-1 fall
-1 rise
90%
10%
T2.8.1
T2.8.1
T2.8.1
T2.8.1
PMD Output Pair
T2.8.2
PMD Output Pair
eye pattern
T2.8.2
DP83620
www.ti.com SNLS339C –JANUARY 2011–REVISED APRIL 2013
4.12 AC Specifications — 100BASE-TX Transmit Timing (t
R/F
& Jitter)
Parameter Description Notes Min Typ Max Units
T2.8.1 100 Mb/s PMD Output Pair t
R
and t
F
(1)
3 4 5 ns
100 Mb/s t
R
and t
F
Mismatch
(2)
500 ps
T2.8.2 100 Mb/s PMD Output Pair Transmit Jitter 1.4 ns
(1) Rise and fall times taken at 10% and 90% of the +1 or -1 amplitude
(2) Normal Mismatch is the difference between the maximum and minimum of all rise and fall times
4.13 AC Specifications — 100BASE-TX and 100BASE-FX MII Receive Packet Latency
Timing
Parameter Description Notes Min Typ Max Units
T2.9.1 100BASE-TX mode 20
Carrier Sense ON Delay
(1)
bits
100BASE-FX mode 10
T2.9.2 100BASE-TX mode 24
Receive Data Latency
(2)(3)
bits
100BASE-FX mode 14
(1) Carrier Sense On Delay is determined by measuring the time from the first bit of the “J” code group to the assertion of Carrier Sense.
(2) 1 bit time = 10 ns in 100 Mb/s mode.
(3) Enabling PHY Status Frames will introduce variability in Receive Data Latency due to insertion of PHY Status Frames into the receive
datapath.
Copyright © 2011–2013, Texas Instruments Incorporated Electrical Specifications 19
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