Datasheet
SN75DP130
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SLLSE57D –APRIL 2011–REVISED JULY 2013
Table 8. SN75DP130 Local I
2
C Control and Status Registers (continued)
ACCESS
(
ADDRESS BIT(S) DESCRIPTION
1)
0Ch 6:4 AEQ_L2_LANE3_SET. This field selects the EQ setting for Lane 3 when I2C_EQ_ENABLE RW
is set, the DisplayPort sink is selected, Link Training is enabled, and the Link Training results
in Level 2 pre-emphasis.
000 – 0 dB EQ gain (default) 100 – 5 dB (HBR); 10 dB (HBR2)
001 – 1.5 dB (HBR); 3.5 dB (HBR2) 101 – 6 dB (HBR); 13 dB (HBR2)
010 – 3 dB (HBR); 6 dB (HBR2) 110 – 7 dB (HBR); 15 dB (HBR2)
011 – 4 dB (HBR); 8 dB (HBR2) 111 – 9 dB (HBR); 18 dB (HBR2)
2:0 AEQ_L3_LANE3_SET. This field selects the EQ setting for Lane 3 when I2C_EQ_ENABLE RW
is set, the DisplayPort sink is selected, Link Training is enabled, and the Link Training results
in Level 3 pre-emphasis.
000 – 0 dB EQ gain (default) 100 – 5 dB (HBR); 10 dB (HBR2)
001 – 1.5 dB (HBR); 3.5 dB (HBR2) 101 – 6 dB (HBR); 13 dB (HBR2)
010 – 3 dB (HBR); 6 dB (HBR2) 110 – 7 dB (HBR); 15 dB (HBR2)
011 – 4 dB (HBR); 8 dB (HBR2) 111 – 9 dB (HBR); 18 dB (HBR2)
15h 4:3 BOOST. Controls the output pre-emphasis amplitude when the DisplayPort sink is selected; RW
allows to reduce or increase all pre-emphasis settings by ~10%. Setting this field will impact
V
OD
when pre-emphasis is disabled.
This setting also impacts the output in TMDS mode for the DisplayPort sink connection when
the DisplayPort sink CAD_SNK input is high.
00 – Pre-emphasis reduced by ~10%; V
OD
reduced by 10% if pre-emphasis is disabled.
01 – Pre-emphasis nominal (default)
10 – Pre-emphasis increased by ~10%; V
OD
increased by 10% if pre-emphasis is disabled.
11 – Reserved
2 DP_TMDS_VOD. Sets the target output swing in TMDS mode when the DisplayPort sink is RW
selected, where CAD_SNK input is high.
0 – Low TMDS output swing (default)
1 – High TMDS output swing
1:0 DP_TMDS_VPRE. Controls the output pre-emphasis in TMDS mode when the DisplayPort RW
sink is selected, where CAD_SNK input is high.
00 – No TMDS pre-emphasis(default)
01 – Low TMDS pre-emphasis
10 – High TMDS pre-emphasis
11 – Reserved
17h 3 HPD_TEST_MODE
0 – Normal HPD mode. HPD_SRC reflects the status of HPD_SNK (default) RW
1 – Test mode. HPD_SNK is pulled high internally, and the HPD_SRC output is driven high
and the Main Link is activated, depending on the squelch setting. This mode allows
execution of 17h certain tests on SN75DP130 without a connected display sink.
1 CAD_OUTPUT_INVERT RW
0 – CAD_SRC output high means TMDS cable adapter detected (default)
1 – CAD_SRC output low means TMDS cable adapter detected
CAD_TEST_MODE
0 – Normal CAD mode. CAD_SRC reflects the status of CAD_SNK, based on the value of
CAD_OUTPUT_INVERT (default)
0
1 – Test mode. CAD_SRC indicates TMDS mode, depending on the value of
CAD_OUTPUT_INVERT; CAD_SNK input is ignored. This mode allows execution of certain
tests on SN75DP130 without a connected TMDS display sink.
18h – 1Ah 7:0 TI_TEST. These registers shall not be modified. RW
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