Datasheet
Shutdown
Mode
EN and RSTN high
Power up
Standby
Mode
EN or RSTN low
Active Mode
CAD=0 DP mode
CAD=1 TMDS
mode
D3 Power
Down Mode
enter D3
AUX cmd
(CAD=0)
Exit D3
AUX cmd
or CAD high
EN or RSTN low
EN or RSTN low
HPD_SNK low
for >t
T(HPD)
HPD_SNK high;
AUX link
training started
HPD_SNK low
for >t
T(HPD)
Output
Disable
Mode
invalid DPCD
register entry
DPCD register
corrected
a
n
y s
t
a
t
e
Squelch event
Squelch release
DP++ MultiModeSourceSideRe-driver; AUXChannel ACCapacitorsShort
Circuitedin TMDSModebyInternalFET; AUXChannelMonitoredforLink Training
AUX
HPD
AUXSRC-
AUXSRC+
SCL_CTL
SDA_CTL
GPU
MAIN[3:0]
DP connector
IN[3:0]
4 diff 4 diff
OUT[3:0]
HPD_SRC
HPD_SNK
CAD
AUXSNK-
AUXSNK+
CAD_SNK
SCL
SDA
SN75DP130
100kW
100kW
3.3V
CAD
DDC
CAD
1M
Option 1: CAD_OUT drivesGPU;
protectsbackcurrenttoGPU.
Option 2: connectCADsignal
fromboardconnectortotheGPU.
CAD_SRC
R
I2C
R
I2C
3.3V
I
2
Crequiredtoselectthis
configuration
MinimizeStubLineLength
I
2
Cinterfacemaybeusedtofully
configureoutputsignalconditioning
andEQsettings. 10kW resistorsare
recommendedforR
I2C
.
SN75DP130
www.ti.com
SLLSE57D –APRIL 2011–REVISED JULY 2013
Figure 24. Alternate Low-BOM DP++ Dual-Mode Configuration
OPERATING MODES OVERVIEW
Figure 25. SN75DP130 Operating Modes Flow Diagram
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