Datasheet

SN75DP130
www.ti.com SLLSE57D –APRIL 2011–REVISED JULY 2013
TYPICAL CHARACTERISTICS
A. DisplayPort output jitter measured at the surface mount pins
A. Gain represents SN75DP130 design simulation
connected to the main link output channels on the SN75DP130
characterization test board; input jitter generated from test board with
variable input trace lengths using 4 mil traces of lengths 2 inches to
22 inches generating the typical input jitter as represented in Table 1.
Figure 15. Typical EQ Gain Curves Figure 16. DisplayPort Sink Jitter Performance with Optimal
EQ Settings
Table 1. Characterization Test Board Trace Lengths Related to Input Jitter
INPUT MODE TRACE LENGTH (inches) TOTAL INPUT JITTER (ps) RECOMMENDED EQ SETTING
2 14.4 8
6 23.1 8
10 38.8 10
Display Port HBR2
14 58.9 10
18 84.8 13
22 113.9 13
2 15.8 6
6 21.3 6
10 33.2 6
TMDS 3.4 Gbps
14 49.9 13
18 70.5 13
22 91.5 13
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