Datasheet
Internal Patterns
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4.3 Internal Patterns
In addition to the externally provided sequences through the 24-bit RGB interface of the DLPC300, the
DLP LightCrafter offers the ability to pre-load patterns into the DLPC300’ s memory (mDDR) to achieve
faster frame rates. Once the patterns are pre-loaded, the FPGA manages the bit planes stored in the
mDDR. The mDDR accommodates four 608 × 684 images of 24-bit RGB data or 96 bit-planes (24 bit-
planes × 4 images). The 96 bit-plane buffer is arranged in a circular buffer style, meaning that the last bit
plane addition to the buffer replaces the oldest stored bit plane.
The oldest set of bit planes in the bit-plane buffer is displayed. Thus, the displayed patterns will lag by
16.66 ms at 60 Hz frame rate while the circular buffer is filled. After the initial 16.66-ms delay, there is no
additional delay for subsequent patterns since the circular buffer is filled.
With the FPGA, the pattern frame rate can be calculated with the following equation:
Pattern Rate = (1/Pattern Exposure Period) + (Bit Plane Load Time) + (Buffer Rotate Overhead)
where
• Typical bit plane load time = 230 µs
• Typical buffer rotate overhead = 135 µs (2)
Table 4-2 shows the maximum pattern rate that can be achieved by using a single FPGA’s internal buffer
in continuous mode.
Table 4-2. Maximum Internal Pattern Rate
MAXIMUM NUMBER OF MAXIMUM PATTERN RATE
COLOR MODE
PATTERNS
1-bit per pixel 96 4000 Hz
2-bit per pixel 48 1600 Hz
3-bit per pixel 32 480 Hz
4-bit per pixel 24 360 Hz
Monochrome
5-bit per pixel 16 240 Hz
6-bit per pixel 16 240 Hz
7-bit per pixel 12 180 Hz
8-bit per pixel 12 120 Hz
These locally stored patterns have a pre-defined exposure time that is detailed in Table 4-3. Note that the
exposure time decrements by 500 µs from the maximum exposure time. Thus, the minimum might not be
a step size decrease from the second to last minimum exposure time.
Table 4-3. Internal Pattern Exposure Time
MAXIMUM EXPOSURE MINIMUM EXPOSURE STEP SIZE DECREASE
BIT DEPTH
TIME (µs) TIME (µs) (µs)
8-bit 20,000 8,333 500
7-bit 20,000 4,500 500
6-bit 20,000 2,500 500
5-bit 20,000 2,000 500
4-bit 20,000 1,600 500
3-bit 20,000 1,470 500
2-bit 20,000 666 500
1-bit 100,000 250 500
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Pattern Sequences DLPU006C–January 2012–Revised December 2013
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