Datasheet

From Output
Under Test
Tester
Channel
LOAD CIRCUIT
C = 50 pF
C = 5 pF for Disable Time
L
L
R
L
DLP5500
DLPS013E –APRIL 2010–REVISED SEPTEMBER 2013 www.ti.com
ELECTRICAL CHARACTERISTICS
over operating free-air temperature range (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
(Under RECOMMENDED OPERATING
CONDITIONS)
High-level output voltage
(1)
, See I
OH
= –20
V
OH
V
CC
= 3.0 V, 2.4 V
Figure 8 mA
Low-level output voltage
(1)
, See I
OH
= 15
V
OL
V
CC
= 3.6 V, 0.4 V
Figure 8 mA
I
OZ
High impedance output current
(1)
V
CC
= 3.6 V 10 µA
V
OH
= 2.4 V, V
CC
≥ 3.0 V –20
I
OH
High-level output current
(1)
mA
V
OH
= 1.7 V, V
CC
≥ 2.25 V –15
V
OL
= 0.4 V, V
CC
≥ 3.0 V 15
I
OL
Low-level output current
(1)
mA
V
OL
= 0.4 V, V
CC
≥ 2.25 V 14
V
IH
High-level input voltage
(1)
1.7 VCC + .3 V
V
IL
Low-level input voltage
(1)
-0.3 0.7 V
I
IL
Low-level input current
(1)
V
CC
= 3.6 V, V
I
= 0 V –60 µA
I
IH
High-level input current
(1)
V
CC
= 3.6 V, V
I
= V
CC
200 µA
I
CC
Current into V
CC
terminal V
CC
= 3.6 V, 750 mA
I
CCI
Current into V
OFFSET
terminal
(2)
V
CCI
= 3.6 V 450 mA
I
CC2
Current into V
CC2
terminal V
CC2
= 8.75V 25 mA
Z
IN
Internal Differential Impedance 95 105 Ω
Line Differential Impedance (PWB
Z
LINE
90 100 110 Ω
or Trace)
C
I
Input capacitance
(1)
f = 1 MHz 10 pF
C
O
Output capacitance
(1)
f = 1 MHz 10 pF
C
IM
Input capacitance for
f = 1 MHz 160 210 pF
MBRST[0:15] pins
(1) Applies to LVCMOS pins only.
(2) Exceeding the maximum allowable absolute voltage difference between V
CC
and V
CCI
may result in excess current draw. (Refer to
Absolute Maximum Ratings for details)
Figure 8. Measurement Condition for LVCMOS Output
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