User manual

0.90
0.10
1.80
A BC D
0.10
1
10
www.ti.com Functional Description
2.1.8 Headers
The three main sets of headers on the board are on a 0.100" grid and separated for a particular function.
2.1.8.1 BoosterPack 1
Figure 2-2 is a BoosterPack XL connection defined in the BoosterPack Design Guide. The port names and
voltage rails are listed in the silk screen next to the pin of the header.
Figure 2-2. Booster Pack 1
J29 J30
TM4C129X TM4C129X
CON A Booster Function DK Function CON B Booster Function DK Function
Port Port
1 3.3V N/A GND 1 GND N/A
2 Analog In PE2 AIN01 2 Timer Output PS2 T3CCP0
3 UART RX PH6 U5RX 3 INT. GPIO PQ7
4 UART TX PH7 U5TX 4 Test N/A NC
5 Int. GPIO PN7 PN7 5 RESET RESET RESET
SSI2XDAT0/
6 SPI A CLK PF3 SSI3CLK 6 SPI_B_SIMO PG5
I2C3SDA
SSI2DAT1/
7 SPI B CLK PG7 SSI2CLK 7 SPI_B_SOMI PG4
I2C3CL
8 GPIO PJ2 8 GPIO PN0 PN0
9 GPIO PB4 9 GPIO PN1 PN1
10 GPIO PJ7 10 GPIO PN2 PN2
TM4C129X TM4C129X
CON C Booster Function DK Function CON D EM Function DK Function
Port Port
1 5V N/A 1 Timer Output PM5 T4CCP1
2 GND 2 Timer Output PD3 T1CCP1
3 Analog IN PE3 AIN00 3 Timer Output PS3 T3CCP1
4 Analog IN PE6 AIN20 4 Timer Output PL5 T0CCP1
5 Analog IN PK0 AIN16 5 Timer Output PL4 T0CCP0
6 Analog IN PK1 AIN17 6 Timer Output PS0 T2CCP0
7 Analog IN PK2 AIN18 7 Timer Output PS1 T2CCP1
8 Analog IN PK3 AIN19 8 Timer Output PQ3 T7CCP1
9 Analog IN PE0 AIN03 9 Timer Output NC
10 Analog IN PE1 AIN02 10 Timer Output PM7 T5CCP1
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SPMU360–October 2013 Hardware Description
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