Datasheet

Figure 2-3. Cortex-M4F Register Set
SP (R13)
LR (R14)
PC (R15)
R5
R6
R7
R0
R1
R3
R4
R2
R10
R11
R12
R8
R9
Low registers
High registers
MSP
‡
PSP
‡
PSR
PRIMASK
FAULTMASK
BASEPRI
CONTROL
General-purpose registers
Stack Pointer
Link Register
Program Counter
Program status register
Exception mask registers
CONTROL register
Special registers
‡
Banked version of SP
Table 2-2. Processor Register Map
See
page
DescriptionResetTypeNameOffset
97Cortex General-Purpose Register 0-RWR0-
97Cortex General-Purpose Register 1-RWR1-
97Cortex General-Purpose Register 2-RWR2-
97Cortex General-Purpose Register 3-RWR3-
97Cortex General-Purpose Register 4-RWR4-
97Cortex General-Purpose Register 5-RWR5-
97Cortex General-Purpose Register 6-RWR6-
97Cortex General-Purpose Register 7-RWR7-
97Cortex General-Purpose Register 8-RWR8-
97Cortex General-Purpose Register 9-RWR9-
97Cortex General-Purpose Register 10-RWR10-
97Cortex General-Purpose Register 11-RWR11-
95December 13, 2013
Texas Instruments-Advance Information
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