Datasheet

■ When the chip select is programmed to access the PSRAM, the MODE bit of the

EPIHBnCFGn register must be programmed to enable address and data muxed

(ADMUX). Page mode accesses are not supported by the EPI.

■ BURST is optimized for word-length bursting for SDRAM and PSRAM accesses.

The subsequent list identifies the steps for initializing the PSRAM interface:

1. Follow the EPI initialization steps in “Initialization and Configuration” on page 852.

2. Enable Host Bus 16 Mode by setting the MODE bits in the EPICFG register to 0x13. Choose

between an integer or formula clock divide for the baud rate by configuring the INTDIV bit in

the EPICFG register.

3. Configure the EPIBAUD register to the desired baud rate.

4. Since the EPI module only supports asynchronous programming of the configuration registers,

clock gate the EPI clock by programming both the CLKGATE and CLKGATEI bits in the

EPIHB16CFG register to 0.

5. Prepare for writing the PSRAM's Bus Configuration Register by setting the ALEHIGH = 1 and

MODE=0x0 in the EPIHB16CFG register.

6. Program the EPIHBPSRAM register to be loaded into the CR register of the PSRAM by

configuring bits [21:0].

■ CR[20:19] =0x0, reserved

■ CR[19:18] = 0x2 to enable configuring of the CR register

■ CR[15]= 0x1 to enable asynchronous access

■ CR [14] = 0 if the iRDY signal is used for memory transfers; if the design will not use the

iRDY signal CR[14] should be cleared.

■ CR[13:11] must be programmed to have a matching read and write wait state configuration

as is programmed in the EPIHB16CFG and EPIHB16TIME register.

■ CR[10] configures the polarity of the WAIT signal and should match the configuration of the

IRDYINV bit in the EPIHB16CFG register.

■ CR[8]=0x1 to configure the appropriate wait configuration of the data

■ CR[2:0]=0x7 since the EPI interface in PSRAM mode is a continuous burst access.

7. Set the WRCRE bit in the EPIHB16CFGn register to initiate a write from the EPIHBPSRAM

Note: If the PSRAM's CR register must be reprogrammed after initialization, the application should

allow the previous transfer to complete before beginning configuration to ensure proper

PSRAM functionality.

869December 13, 2013

Texas Instruments-Advance Information

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TM4C129XNCZAD Microcontroller