Datasheet

DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0000.00ROreserved31:8
GPIO Commit
DescriptionValue
The corresponding GPIOAFSEL, GPIOPUR, GPIOPDR, or
GPIODEN bits cannot be written.
0
The corresponding GPIOAFSEL, GPIOPUR, GPIOPDR, or
GPIODEN bits can be written.
1
Note: The default register type for the GPIOCR register is RO for
all GPIO pins with the exception of the NMI pin and the four
JTAG/SWD pins (see “Signal Tables” on page 2034 for pin
numbers). These six pins are the only GPIOs that are
protected by the GPIOCR register. Because of this, the
register type for the corresponding GPIO Ports is RW.
The default reset value for the GPIOCR register is
0x0000.00FF for all GPIO pins, with the exception of the NMI
pin and the four JTAG/SWD pins (see “Signal
Tables” on page 2034 for pin numbers). To ensure that the JTAG
and NMI pins are not accidentally programmed as GPIO pins,
these pins default to non-committable. Because of this, the
default reset value of GPIOCR changes for the corresponding
ports.
--CR7:0
December 13, 2013816
Texas Instruments-Advance Information
General-Purpose Input/Outputs (GPIOs)