Datasheet

15.1.2 Power Management .................................................................................................. 1069
15.1.3 Reset Management ................................................................................................... 1069
15.1.4 µDMA and Interrupt Requests .................................................................................... 1069
15.1.5 Operation Description ................................................................................................ 1070
15.1.6 SHA/MD5 Performance Information ............................................................................ 1076
15.1.7 SHA/MD5 Programming Guide ................................................................................... 1077
15.2 SHA/MD5 Register Map ............................................................................................. 1081
15.3 SHA/MD5 Register Descriptions ................................................................................. 1083
15.4 SHA/MD5 µDMA Control Register Descriptions (Encryption Control Offset) ................... 1097
16 General-Purpose Timers .................................................................................... 1102
16.1 Block Diagram ........................................................................................................... 1103
16.2 Signal Description ..................................................................................................... 1104
16.3 Functional Description ............................................................................................... 1105
16.3.1 GPTM Reset Conditions ............................................................................................ 1106
16.3.2 Timer Clock Source ................................................................................................... 1106
16.3.3 Timer Modes ............................................................................................................. 1107
16.3.4 Wait-for-Trigger Mode ................................................................................................ 1116
16.3.5 Synchronizing GP Timer Blocks .................................................................................. 1117
16.3.6 DMA Operation ......................................................................................................... 1118
16.3.7 ADC Operation .......................................................................................................... 1118
16.3.8 Accessing Concatenated 16/32-Bit GPTM Register Values .......................................... 1118
16.4 Initialization and Configuration .................................................................................... 1119
16.4.1 One-Shot/Periodic Timer Mode .................................................................................. 1119
16.4.2 Real-Time Clock (RTC) Mode ..................................................................................... 1120
16.4.3 Input Edge-Count Mode ............................................................................................. 1120
16.4.4 Input Edge Time Mode ............................................................................................... 1121
16.4.5 PWM Mode ............................................................................................................... 1121
16.5 Register Map ............................................................................................................ 1122
16.6 Register Descriptions ................................................................................................. 1123
17 Watchdog Timers ............................................................................................... 1175
17.1 Block Diagram ........................................................................................................... 1176
17.2 Functional Description ............................................................................................... 1176
17.2.1 Register Access Timing ............................................................................................. 1177
17.3 Initialization and Configuration .................................................................................... 1177
17.4 Register Map ............................................................................................................ 1177
17.5 Register Descriptions ................................................................................................. 1178
18 Analog-to-Digital Converter (ADC) ................................................................... 1200
18.1 Block Diagram ........................................................................................................... 1201
18.2 Signal Description ..................................................................................................... 1202
18.3 Functional Description ............................................................................................... 1203
18.3.1 Sample Sequencers .................................................................................................. 1204
18.3.2 Module Control .......................................................................................................... 1204
18.3.3 Hardware Sample Averaging Circuit ........................................................................... 1210
18.3.4 Analog-to-Digital Converter ........................................................................................ 1210
18.3.5 Differential Sampling .................................................................................................. 1213
18.3.6 Internal Temperature Sensor ...................................................................................... 1215
18.3.7 Digital Comparator Unit .............................................................................................. 1216
18.4 Initialization and Configuration .................................................................................... 1220
December 13, 20138
Texas Instruments-Advance Information
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