Datasheet

DescriptionResetTypeNameBit/Field
GPIO Interrupt Raw Status
DescriptionValue
An interrupt condition has not occurred on the corresponding
pin.
0
An interrupt condition has occurred on the corresponding pin.1
For edge-detect interrupts, this bit is cleared by writing a 1 to the
corresponding bit in the GPIOICR register.
For a GPIO level-detect interrupt, the bit is cleared when the level is
deasserted.
0x00RORIS7:0
797December 13, 2013
Texas Instruments-Advance Information
Tiva
™
TM4C129XNCZAD Microcontroller