Datasheet

8. Program each pad in the port to have either pull-up, pull-down, or open drain functionality through
the GPIOPUR, GPIOPDR, GPIOODR register. Slew rate may also be programmed, if needed,
through the GPIOSLR register.
9. To enable GPIO pins as digital I/Os, set the appropriate DEN bit in the GPIODEN register. To
enable GPIO pins to their analog function (if available), set the GPIOAMSEL bit in the
GPIOAMSEL register.
10. Program the GPIOIS, GPIOIBE, GPIOBE, GPIOEV, and GPIOIM registers to configure the
type, event, and mask of the interrupts for each port.
11. Optionally, software can lock the configurations of the NMI and JTAG/SWD pins on the GPIO
port pins, by setting the LOCK bits in the GPIOLOCK register.
When the internal POR signal is asserted and until otherwise configured, all GPIO pins are configured
to be undriven (tristate): GPIOAFSEL=0, GPIODEN=0, GPIOPDR=0, and GPIOPUR=0Table
10-4 on page 785 shows all possible configurations of the GPIO pads and the control register settings
required to achieve them. Table 10-5 on page 786 shows how a rising edge interrupt is configured
for pin 2 of a GPIO port.
Table 10-4. GPIO Pad Configuration Examples
GPIO Register Bit Value
a
Configuration
SLRDR12RDR8RDR4RDR2RPDRPURDENODRDIRAFSEL
XXXXX??1000Digital Input
(GPIO)
???????1010Digital Output
(GPIO)
?????XX1110Open Drain Output
(GPIO)
?????XX11X1Open Drain
Input/Output
(I2CSDA)
XXXXX??10X1Digital Input (Timer
CCP)
XXXXX??10X1Digital Input (QEI)
???????10X1Digital Output
(PWM)
???????10X1Digital Output
(Timer PWM)
???????10X1Digital Input/Output
(SSI)
???????10X1Digital Input/Output
(UART)
XXXXX000000Analog Input
(Comparator)
???????10X1Digital Output
(Comparator)
a. X=Ignored (don’t care bit)
?=Can be either 0 or 1, depending on the configuration
785December 13, 2013
Texas Instruments-Advance Information
Tiva
™
TM4C129XNCZAD Microcontroller