Datasheet

Lower-power battery-backed Hibernation module
Real-Time Clock in Hibernation module
Two Watchdog Timers
One timer runs off the main oscillator
One timer runs off the precision internal oscillator
Up to 140 GPIOs, depending on configuration
Highly flexible pin muxing allows use as GPIO or one of several peripheral functions
Independently configurable to 2-, 4-, 8-, 10-, or 12-mA drive capability
Up to 4 GPIOs can have 18-mA drive capability
The following sections provide more detail on each of these functions.
1.3.9.1 Direct Memory Access (see page 707)
The TM4C129XNCZAD microcontroller includes a Direct Memory Access (DMA) controller, known
as micro-DMA (μDMA). The μDMA controller provides a way to offload data transfer tasks from the
Cortex-M4F processor, allowing for more efficient use of the processor and the available bus
bandwidth. The μDMA controller can perform transfers between memory and peripherals. It has
dedicated channels for each supported on-chip module and can be programmed to automatically
perform transfers between peripherals and memory as the peripheral is ready to transfer more data.
The μDMA controller provides the following features:
ARM PrimeCell
®
32-channel configurable µDMA controller
Support for memory-to-memory, memory-to-peripheral, and peripheral-to-memory in multiple
transfer modes
Basic for simple transfer scenarios
Ping-pong for continuous data flow
Scatter-gather for a programmable list of up to 256 arbitrary transfers initiated from a single
request
Highly flexible and configurable channel operation
Independently configured and operated channels
Dedicated channels for supported on-chip modules
Flexible channel assignments
One channel each for receive and transmit path for bidirectional modules
Dedicated channel for software-initiated transfers
Per-channel configurable priority scheme
Optional software-initiated requests for any channel
Two levels of priority
December 13, 201376
Texas Instruments-Advance Information
Architectural Overview