Datasheet

Table 9-13. μDMA Register Map (continued)
See
page
DescriptionResetTypeNameOffset
746DMA Channel Useburst Set0x0000.0000RWDMAUSEBURSTSET0x018
747DMA Channel Useburst Clear-WODMAUSEBURSTCLR0x01C
748DMA Channel Request Mask Set0x0000.0000RWDMAREQMASKSET0x020
749DMA Channel Request Mask Clear-WODMAREQMASKCLR0x024
750DMA Channel Enable Set0x0000.0000RWDMAENASET0x028
751DMA Channel Enable Clear-WODMAENACLR0x02C
752DMA Channel Primary Alternate Set0x0000.0000RWDMAALTSET0x030
753DMA Channel Primary Alternate Clear-WODMAALTCLR0x034
754DMA Channel Priority Set0x0000.0000RWDMAPRIOSET0x038
755DMA Channel Priority Clear-WODMAPRIOCLR0x03C
756DMA Bus Error Clear0x0000.0000RWDMAERRCLR0x04C
757DMA Channel Assignment0x0000.0000RWDMACHASGN0x500
758DMA Channel Map Select 00x0000.0000RWDMACHMAP00x510
759DMA Channel Map Select 10x0000.0000RWDMACHMAP10x514
760DMA Channel Map Select 20x0000.0000RWDMACHMAP20x518
761DMA Channel Map Select 30x0000.0000RWDMACHMAP30x51C
766DMA Peripheral Identification 40x0000.0004RODMAPeriphID40xFD0
762DMA Peripheral Identification 00x0000.0030RODMAPeriphID00xFE0
763DMA Peripheral Identification 10x0000.00B2RODMAPeriphID10xFE4
764DMA Peripheral Identification 20x0000.000BRODMAPeriphID20xFE8
765DMA Peripheral Identification 30x0000.0000RODMAPeriphID30xFEC
767DMA PrimeCell Identification 00x0000.000DRODMAPCellID00xFF0
768DMA PrimeCell Identification 10x0000.00F0RODMAPCellID10xFF4
769DMA PrimeCell Identification 20x0000.0005RODMAPCellID20xFF8
770DMA PrimeCell Identification 30x0000.00B1RODMAPCellID30xFFC
9.5 μDMA Channel Control Structure
The μDMA Channel Control Structure holds the transfer settings for a μDMA channel. Each channel
has two control structures, which are located in a table in system memory. Refer to “Channel
Configuration” on page 712 for an explanation of the Channel Control Table and the Channel Control
Structure.
The channel control structure is one entry in the channel control table. Each channel has a primary
and alternate structure. The primary control structures are located at offsets 0x0, 0x10, 0x20 and
so on. The alternate control structures are located at offsets 0x200, 0x210, 0x220, and so on.
731December 13, 2013
Texas Instruments-Advance Information
Tiva
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TM4C129XNCZAD Microcontroller