Datasheet

UART3 (modem flow control)
UART4 (modem flow control)
EIA-485 9-bit support
Standard FIFO-level and End-of-Transmission interrupts
Efficient transfers using Micro Direct Memory Access Controller (µDMA)
Separate channels for transmit and receive
Receive single request asserted when data is in the FIFO; burst request asserted at
programmed FIFO level
Transmit single request asserted when there is space in the FIFO; burst request asserted at
programmed FIFO level
Global Alternate Clock (ALTCLK) resource or System Clock (SYSCLK) can be used to generate
baud clock
1.3.8.5 1-Wire Master Module (see page 1505)
1-Wire is a bi-directional serial communication protocol which provides both power and data over
a single wire. The 1-Wire Master module can interface with a multiple variety of slaves such as
thermometers, mixed-signal devices, memory, and authentication devices.
The TM4C129XNCZAD microcontroller includes a 1-Wire Master module with the following features:
Support for standard and overdrive speeds, including a late-sample mechanism
Allows transfers of send, receive and bi-directional bits
Data size transfers of 1, 2, 3, or 4 bytes with sub-byte search and enumeration support
Interrupt capability for transaction pacing and line error
Optional two-wire support for isolated lines and high voltage use
Efficient transfers using Micro Direct Memory Access Controller (µDMA)
1.3.8.6 I
2
C (see page 1424)
The Inter-Integrated Circuit (I
2
C) bus provides bi-directional data transfer through a two-wire design
(a serial data line SDA and a serial clock line SCL). The I
2
C bus interfaces to external I
2
C devices
such as serial memory (RAMs and ROMs), networking devices, LCDs, tone generators, and so on.
The I
2
C bus may also be used for system testing and diagnostic purposes in product development
and manufacture.
Each device on the I
2
C bus can be designated as either a master or a slave. I
2
C module supports
both sending and receiving data as either a master or a slave and can operate simultaneously as
both a master and a slave. Both the I
2
C master and slave can generate interrupts.
The TM4C129XNCZAD microcontroller includes I
2
C modules with the following features:
Devices on the I
2
C bus can be designated as either a master or a slave
73December 13, 2013
Texas Instruments-Advance Information
Tiva
TM4C129XNCZAD Microcontroller