Datasheet
Register 7: PWM Raw Interrupt Status (PWMRIS), offset 0x018 ...................................................... 1956
Register 8: PWM Interrupt Status and Clear (PWMISC), offset 0x01C .............................................. 1959
Register 9: PWM Status (PWMSTATUS), offset 0x020 .................................................................... 1962
Register 10: PWM Fault Condition Value (PWMFAULTVAL), offset 0x024 ........................................... 1964
Register 11: PWM Enable Update (PWMENUPD), offset 0x028 ......................................................... 1966
Register 12: PWM0 Control (PWM0CTL), offset 0x040 ...................................................................... 1970
Register 13: PWM1 Control (PWM1CTL), offset 0x080 ...................................................................... 1970
Register 14: PWM2 Control (PWM2CTL), offset 0x0C0 ..................................................................... 1970
Register 15: PWM3 Control (PWM3CTL), offset 0x100 ...................................................................... 1970
Register 16: PWM0 Interrupt and Trigger Enable (PWM0INTEN), offset 0x044 ................................... 1975
Register 17: PWM1 Interrupt and Trigger Enable (PWM1INTEN), offset 0x084 ................................... 1975
Register 18: PWM2 Interrupt and Trigger Enable (PWM2INTEN), offset 0x0C4 ................................... 1975
Register 19: PWM3 Interrupt and Trigger Enable (PWM3INTEN), offset 0x104 ................................... 1975
Register 20: PWM0 Raw Interrupt Status (PWM0RIS), offset 0x048 ................................................... 1978
Register 21: PWM1 Raw Interrupt Status (PWM1RIS), offset 0x088 ................................................... 1978
Register 22: PWM2 Raw Interrupt Status (PWM2RIS), offset 0x0C8 .................................................. 1978
Register 23: PWM3 Raw Interrupt Status (PWM3RIS), offset 0x108 ................................................... 1978
Register 24: PWM0 Interrupt Status and Clear (PWM0ISC), offset 0x04C .......................................... 1980
Register 25: PWM1 Interrupt Status and Clear (PWM1ISC), offset 0x08C .......................................... 1980
Register 26: PWM2 Interrupt Status and Clear (PWM2ISC), offset 0x0CC .......................................... 1980
Register 27: PWM3 Interrupt Status and Clear (PWM3ISC), offset 0x10C .......................................... 1980
Register 28: PWM0 Load (PWM0LOAD), offset 0x050 ...................................................................... 1982
Register 29: PWM1 Load (PWM1LOAD), offset 0x090 ...................................................................... 1982
Register 30: PWM2 Load (PWM2LOAD), offset 0x0D0 ...................................................................... 1982
Register 31: PWM3 Load (PWM3LOAD), offset 0x110 ...................................................................... 1982
Register 32: PWM0 Counter (PWM0COUNT), offset 0x054 ............................................................... 1983
Register 33: PWM1 Counter (PWM1COUNT), offset 0x094 ............................................................... 1983
Register 34: PWM2 Counter (PWM2COUNT), offset 0x0D4 .............................................................. 1983
Register 35: PWM3 Counter (PWM3COUNT), offset 0x114 ............................................................... 1983
Register 36: PWM0 Compare A (PWM0CMPA), offset 0x058 ............................................................ 1984
Register 37: PWM1 Compare A (PWM1CMPA), offset 0x098 ............................................................ 1984
Register 38: PWM2 Compare A (PWM2CMPA), offset 0x0D8 ............................................................ 1984
Register 39: PWM3 Compare A (PWM3CMPA), offset 0x118 ............................................................. 1984
Register 40: PWM0 Compare B (PWM0CMPB), offset 0x05C ............................................................ 1985
Register 41: PWM1 Compare B (PWM1CMPB), offset 0x09C ............................................................ 1985
Register 42: PWM2 Compare B (PWM2CMPB), offset 0x0DC ........................................................... 1985
Register 43: PWM3 Compare B (PWM3CMPB), offset 0x11C ............................................................ 1985
Register 44: PWM0 Generator A Control (PWM0GENA), offset 0x060 ............................................... 1986
Register 45: PWM1 Generator A Control (PWM1GENA), offset 0x0A0 ............................................... 1986
Register 46: PWM2 Generator A Control (PWM2GENA), offset 0x0E0 ............................................... 1986
Register 47: PWM3 Generator A Control (PWM3GENA), offset 0x120 ............................................... 1986
Register 48: PWM0 Generator B Control (PWM0GENB), offset 0x064 ............................................... 1989
Register 49: PWM1 Generator B Control (PWM1GENB), offset 0x0A4 ............................................... 1989
Register 50: PWM2 Generator B Control (PWM2GENB), offset 0x0E4 ............................................... 1989
Register 51: PWM3 Generator B Control (PWM3GENB), offset 0x124 ............................................... 1989
Register 52: PWM0 Dead-Band Control (PWM0DBCTL), offset 0x068 ............................................... 1992
Register 53: PWM1 Dead-Band Control (PWM1DBCTL), offset 0x0A8 ............................................... 1992
Register 54: PWM2 Dead-Band Control (PWM2DBCTL), offset 0x0E8 ............................................... 1992
51December 13, 2013
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TM4C129XNCZAD Microcontroller