Datasheet
5.2.1 Device Identification .................................................................................................... 231
5.2.2 Reset Control .............................................................................................................. 231
5.2.3 Non-Maskable Interrupt ............................................................................................... 238
5.2.4 Power Control ............................................................................................................. 239
5.2.5 Clock Control .............................................................................................................. 240
5.2.6 System Control ........................................................................................................... 250
5.3 Initialization and Configuration ..................................................................................... 256
5.4 Register Map .............................................................................................................. 258
5.5 System Control Register Descriptions (System Control Offset) ....................................... 265
5.6 Cryptographic System Control Register Description (CCM Offset) .................................. 551
6 Processor Support and Exception Module ........................................................ 553
6.1 Functional Description ................................................................................................. 553
6.2 Register Map .............................................................................................................. 553
6.3 Register Descriptions .................................................................................................. 553
7 Hibernation Module .............................................................................................. 561
7.1 Block Diagram ............................................................................................................ 563
7.2 Signal Description ....................................................................................................... 563
7.3 Functional Description ................................................................................................. 564
7.3.1 Register Access Timing ............................................................................................... 565
7.3.2 Hibernation Clock Source ............................................................................................ 565
7.3.3 System Implementation ............................................................................................... 568
7.3.4 Battery Management ................................................................................................... 569
7.3.5 Real-Time Clock .......................................................................................................... 569
7.3.6 Tamper ....................................................................................................................... 572
7.3.7 Battery-Backed Memory .............................................................................................. 575
7.3.8 Power Control Using HIB ............................................................................................. 575
7.3.9 Power Control Using VDD3ON Mode ........................................................................... 576
7.3.10 Initiating Hibernate ...................................................................................................... 576
7.3.11 Waking from Hibernate ................................................................................................ 576
7.3.12 Arbitrary Power Removal ............................................................................................. 577
7.3.13 Interrupts and Status ................................................................................................... 578
7.4 Initialization and Configuration ..................................................................................... 578
7.4.1 Initialization ................................................................................................................. 578
7.4.2 RTC Match Functionality (No Hibernation) .................................................................... 579
7.4.3 RTC Match/Wake-Up from Hibernation ......................................................................... 579
7.4.4 External Wake-Up from Hibernation .............................................................................. 580
7.4.5 RTC or External Wake-Up from Hibernation .................................................................. 581
7.4.6 Tamper Initialization ..................................................................................................... 581
7.5 Register Map .............................................................................................................. 581
7.6 Register Descriptions .................................................................................................. 583
8 Internal Memory ................................................................................................... 630
8.1 Block Diagram ............................................................................................................ 630
8.2 Functional Description ................................................................................................. 632
8.2.1 SRAM ........................................................................................................................ 632
8.2.2 ROM .......................................................................................................................... 632
8.2.3 Flash Memory ............................................................................................................. 634
8.2.4 EEPROM .................................................................................................................... 645
8.2.5 Bus Matrix Memory Accesses ...................................................................................... 650
5December 13, 2013
Texas Instruments-Advance Information
Tiva
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TM4C129XNCZAD Microcontroller