Datasheet

Register 12: Ethernet MAC Raw Interrupt Status (EMACRIS), offset 0x038 ........................................ 1689
Register 13: Ethernet MAC Interrupt Mask (EMACIM), offset 0x03C ................................................... 1691
Register 14: Ethernet MAC Address 0 High (EMACADDR0H), offset 0x040 ........................................ 1692
Register 15: Ethernet MAC Address 0 Low Register (EMACADDR0L), offset 0x044 ............................ 1693
Register 16: Ethernet MAC Address 1 High (EMACADDR1H), offset 0x048 ........................................ 1694
Register 17: Ethernet MAC Address 1 Low (EMACADDR1L), offset 0x04C ........................................ 1696
Register 18: Ethernet MAC Address 2 High (EMACADDR2H), offset 0x050 ........................................ 1697
Register 19: Ethernet MAC Address 2 Low (EMACADDR2L), offset 0x054 ......................................... 1699
Register 20: Ethernet MAC Address 3 High (EMACADDR3H), offset 0x058 ........................................ 1700
Register 21: Ethernet MAC Address 3 Low (EMACADDR3L), offset 0x05C ........................................ 1702
Register 22: Ethernet MAC Watchdog Timeout (EMACWDOGTO), offset 0x0DC ................................ 1703
Register 23: Ethernet MAC MMC Control (EMACMMCCTRL), offset 0x100 ........................................ 1704
Register 24: Ethernet MAC MMC Receive Raw Interrupt Status (EMACMMCRXRIS), offset 0x104 ...... 1707
Register 25: Ethernet MAC MMC Transmit Raw Interrupt Status (EMACMMCTXRIS), offset 0x108 ..... 1709
Register 26: Ethernet MAC MMC Receive Interrupt Mask (EMACMMCRXIM), offset 0x10C ................ 1711
Register 27: Ethernet MAC MMC Transmit Interrupt Mask (EMACMMCTXIM), offset 0x110 ................. 1713
Register 28: Ethernet MAC Transmit Frame Count for Good and Bad Frames (EMACTXCNTGB), offset
0x118 .......................................................................................................................... 1715
Register 29: Ethernet MAC Transmit Frame Count for Frames Transmitted after Single Collision
(EMACTXCNTSCOL), offset 0x14C .............................................................................. 1716
Register 30: Ethernet MAC Transmit Frame Count for Frames Transmitted after Multiple Collisions
(EMACTXCNTMCOL), offset 0x150 .............................................................................. 1717
Register 31: Ethernet MAC Transmit Octet Count Good (EMACTXOCTCNTG), offset 0x164 ............... 1718
Register 32: Ethernet MAC Receive Frame Count for Good and Bad Frames (EMACRXCNTGB), offset
0x180 .......................................................................................................................... 1719
Register 33: Ethernet MAC Receive Frame Count for CRC Error Frames (EMACRXCNTCRCERR), offset
0x194 .......................................................................................................................... 1720
Register 34: Ethernet MAC Receive Frame Count for Alignment Error Frames (EMACRXCNTALGNERR),
offset 0x198 ................................................................................................................. 1721
Register 35: Ethernet MAC Receive Frame Count for Good Unicast Frames (EMACRXCNTGUNI), offset
0x1C4 ......................................................................................................................... 1722
Register 36: Ethernet MAC VLAN Tag Inclusion or Replacement (EMACVLNINCREP), offset 0x584 .... 1723
Register 37: Ethernet MAC VLAN Hash Table (EMACVLANHASH), offset 0x588 ................................ 1725
Register 38: Ethernet MAC Timestamp Control (EMACTIMSTCTRL), offset 0x700 ............................. 1726
Register 39: Ethernet MAC Sub-Second Increment (EMACSUBSECINC), offset 0x704 ....................... 1730
Register 40: Ethernet MAC System Time - Seconds (EMACTIMSEC), offset 0x708 ............................ 1731
Register 41: Ethernet MAC System Time - Nanoseconds (EMACTIMNANO), offset 0x70C .................. 1732
Register 42: Ethernet MAC System Time - Seconds Update (EMACTIMSECU), offset 0x710 .............. 1733
Register 43: Ethernet MAC System Time - Nanoseconds Update (EMACTIMNANOU), offset 0x714 .... 1734
Register 44: Ethernet MAC Timestamp Addend (EMACTIMADD), offset 0x718 ................................... 1735
Register 45: Ethernet MAC Target Time Seconds (EMACTARGSEC), offset 0x71C ............................ 1736
Register 46: Ethernet MAC Target Time Nanoseconds (EMACTARGNANO), offset 0x720 ................... 1737
Register 47: Ethernet MAC System Time-Higher Word Seconds (EMACHWORDSEC), offset 0x724 .... 1738
Register 48: Ethernet MAC Timestamp Status (EMACTIMSTAT), offset 0x728 .................................... 1739
Register 49: Ethernet MAC PPS Control (EMACPPSCTRL), offset 0x72C .......................................... 1740
Register 50: Ethernet MAC PPS0 Interval (EMACPPS0INTVL), offset 0x760 ...................................... 1745
Register 51: Ethernet MAC PPS0 Width (EMACPPS0WIDTH), offset 0x764 ....................................... 1746
Register 52: Ethernet MAC DMA Bus Mode (EMACDMABUSMOD), offset 0xC00 .............................. 1747
Register 53: Ethernet MAC Transmit Poll Demand (EMACTXPOLLD), offset 0xC04 ............................ 1751
December 13, 201348
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