Datasheet

Register 118: Universal Asynchronous Receiver/Transmitter Sleep Mode
Clock Gating Control (SCGCUART), offset 0x718
The SCGCUART register provides software the capability to enable and disable the UART modules
in sleep mode. When enabled, a module is provided a clock. When disabled, the clock is disabled
to save power.
Important: This register should be used to control the clocking for the UART modules.
Universal Asynchronous Receiver/Transmitter Sleep Mode Clock Gating Control (SCGCUART)
Base 0x400F.E000
Offset 0x718
Type RW, reset 0x0000.0000
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
S0S1S2S3S4S5S6S7reserved
RWRWRWRWRWRWRWRWROROROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved31:8
UART Module 7 Sleep Mode Clock Gating Control
DescriptionValue
UART module 7 is disabled in sleep mode.0
Enable and provide a clock to UART module 7 in sleep mode.1
0RWS77
UART Module 6 Sleep Mode Clock Gating Control
DescriptionValue
UART module 6 is disabled in sleep mode.0
Enable and provide a clock to UART module 6 in sleep mode.1
0RWS66
UART Module 5 Sleep Mode Clock Gating Control
DescriptionValue
UART module 5 is disabled in sleep mode.0
Enable and provide a clock to UART module 5 in sleep mode.1
0RWS55
UART Module 4 Sleep Mode Clock Gating Control
DescriptionValue
UART module 4 is disabled.0
Enable and provide a clock to UART module 4 in sleep mode.1
0RWS44
December 13, 2013430
Texas Instruments-Advance Information
System Control