Datasheet

Register 114: General-Purpose Input/Output Sleep Mode Clock Gating Control
(SCGCGPIO), offset 0x708
The SCGCGPIO register provides software the capability to enable and disable GPIO modules in
sleep mode. When enabled, a module is provided a clock. When disabled, the clock is disabled to
save power.
Important: This register should be used to control the clocking for the GPIO modules.
General-Purpose Input/Output Sleep Mode Clock Gating Control (SCGCGPIO)
Base 0x400F.E000
Offset 0x708
Type RW, reset 0x0000.0000
16171819202122232425262728293031
S16S17reserved
RWRWROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
S0S1S2S3S4S5S6S7S8S9S10S11S12S13S14S15
RWRWRWRWRWRWRWRWRWRWRWRWRWRWRWRWType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved31:18
GPIO Port T Sleep Mode Clock Gating Control
DescriptionValue
GPIO Port T is disabled in sleep mode.0
Enable and provide a clock to GPIO Port T in sleep mode.1
0RWS1717
GPIO Port S Sleep Mode Clock Gating Control
DescriptionValue
GPIO Port S is disabled in sleep mode.0
Enable and provide a clock to GPIO Port S in sleep mode.1
0RWS1616
GPIO Port R Sleep Mode Clock Gating Control
DescriptionValue
GPIO Port R is disabled in sleep mode.0
Enable and provide a clock to GPIO Port R in sleep mode.1
0RWS1515
GPIO Port Q Sleep Mode Clock Gating Control
DescriptionValue
GPIO Port Q is disabled in sleep mode.0
Enable and provide a clock to GPIO Port Q in sleep mode.1
0RWS1414
December 13, 2013424
Texas Instruments-Advance Information
System Control