Datasheet

Cyclical Redundancy Check (CRC) ............................................................................................ 977
Register 1: CRC Control (CRCCTRL), offset 0x400 ........................................................................... 981
Register 2: CRC SEED/Context (CRCSEED), offset 0x410 ................................................................ 983
Register 3: CRC Data Input (CRCDIN), offset 0x414 ......................................................................... 984
Register 4: CRC Post Processing Result (CRCRSLTPP), offset 0x418 ............................................... 985
Advance Encryption Standard Accelerator (AES) .................................................................... 986
Register 1: AES Key 2_6 (AES_KEY2_6), offset 0x000 ................................................................... 1010
Register 2: AES Key 2_7 (AES_KEY2_7), offset 0x004 ................................................................... 1010
Register 3: AES Key 2_4 (AES_KEY2_4), offset 0x008 ................................................................... 1010
Register 4: AES Key 2_5 (AES_KEY2_5), offset 0x00C .................................................................. 1010
Register 5: AES Key 2_2 (AES_KEY2_2), offset 0x010 ................................................................... 1010
Register 6: AES Key 2_3 (AES_KEY2_3), offset 0x014 ................................................................... 1010
Register 7: AES Key 2_0 (AES_KEY2_0), offset 0x018 ................................................................... 1010
Register 8: AES Key 2_1 (AES_KEY2_1), offset 0x01C .................................................................. 1010
Register 9: AES Key 1_6 (AES_KEY1_6), offset 0x020 ................................................................... 1010
Register 10: AES Key 1_7 (AES_KEY1_7), offset 0x024 ................................................................... 1010
Register 11: AES Key 1_4 (AES_KEY1_4), offset 0x028 ................................................................... 1010
Register 12: AES Key 1_5 (AES_KEY1_5), offset 0x02C .................................................................. 1010
Register 13: AES Key 1_2 (AES_KEY1_2), offset 0x030 ................................................................... 1010
Register 14: AES Key 1_3 (AES_KEY1_3), offset 0x034 ................................................................... 1010
Register 15: AES Key 1_0 (AES_KEY1_0), offset 0x038 ................................................................... 1010
Register 16: AES Key 1_1 (AES_KEY1_1), offset 0x03C .................................................................. 1010
Register 17: AES Initialization Vector Input 0 (AES_IV_IN_0), offset 0x040 ......................................... 1012
Register 18: AES Initialization Vector Input 1 (AES_IV_IN_1), offset 0x044 ......................................... 1012
Register 19: AES Initialization Vector Input 2 (AES_IV_IN_2), offset 0x048 ......................................... 1012
Register 20: AES Initialization Vector Input 3 (AES_IV_IN_3), offset 0x04C ........................................ 1012
Register 21: AES Control (AES_CTRL), offset 0x050 ........................................................................ 1013
Register 22: AES Crypto Data Length 0 (AES_C_LENGTH_0), offset 0x054 ...................................... 1018
Register 23: AES Crypto Data Length 1 (AES_C_LENGTH_1), offset 0x058 ...................................... 1018
Register 24: AES Authentication Data Length (AES_AUTH_LENGTH), offset 0x05C .......................... 1019
Register 25: AES Data RW Plaintext/Ciphertext 0 (AES_DATA_IN_0), offset 0x060 ............................ 1020
Register 26: AES Data RW Plaintext/Ciphertext 1 (AES_DATA_IN_1), offset 0x064 ............................ 1020
Register 27: AES Data RW Plaintext/Ciphertext 2 (AES_DATA_IN_2), offset 0x068 ............................ 1020
Register 28: AES Data RW Plaintext/Ciphertext 3 (AES_DATA_IN_3), offset 0x06C ............................ 1020
Register 29: AES Hash Tag Out 0 (AES_TAG_OUT_0), offset 0x070 ................................................. 1021
Register 30: AES Hash Tag Out 1 (AES_TAG_OUT_1), offset 0x074 ................................................. 1021
Register 31: AES Hash Tag Out 2 (AES_TAG_OUT_2), offset 0x078 ................................................. 1021
Register 32: AES Hash Tag Out 3 (AES_TAG_OUT_3), offset 0x07C ................................................. 1021
Register 33: AES IP Revision Identifier (AES_REVISION), offset 0x080 ............................................. 1022
Register 34: AES System Configuration (AES_SYSCONFIG), offset 0x084 ........................................ 1023
Register 35: AES System Status (AES_SYSSTATUS), offset 0x088 ................................................... 1026
Register 36: AES Interrupt Status (AES_IRQSTATUS), offset 0x08C .................................................. 1027
Register 37: AES Interrupt Enable (AES_IRQENABLE), offset 0x090 ................................................. 1029
Register 38: AES Dirty Bits (AES_DIRTYBITS), offset 0x094 ............................................................. 1031
Register 39: AES DMA Interrupt Mask (AES_DMAIM), offset 0x020 ................................................... 1032
Register 40: AES DMA Raw Interrupt Status (AES_DMARIS), offset 0x024 ........................................ 1034
Register 41: AES DMA Masked Interrupt Status (AES_DMAMIS), offset 0x028 .................................. 1036
Register 42: AES DMA Interrupt Clear (AES_DMAIC), offset 0x02C ................................................... 1037
December 13, 201340
Texas Instruments-Advance Information
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