Datasheet

Register 93: General-Purpose Input/Output Run Mode Clock Gating Control
(RCGCGPIO), offset 0x608
The RCGCGPIO register provides software the capability to enable and disable GPIO modules in
Run mode. When enabled, a module is provided a clock and accesses to module registers are
allowed. When disabled, the clock is disabled to save power and accesses to module registers
generate a bus fault.
Important: This register should be used to control the clocking for the GPIO modules.
General-Purpose Input/Output Run Mode Clock Gating Control (RCGCGPIO)
Base 0x400F.E000
Offset 0x608
Type RW, reset 0x0000.0000
16171819202122232425262728293031
R16R17reserved
RWRWROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
R0R1R2R3R4R5R6R7R8R9R10R11R12R13R14R15
RWRWRWRWRWRWRWRWRWRWRWRWRWRWRWRWType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved31:18
GPIO Port T Run Mode Clock Gating Control
DescriptionValue
GPIO Port T is disabled.0
Enable and provide a clock to GPIO Port T in Run mode.1
0RWR1717
GPIO Port S Run Mode Clock Gating Control
DescriptionValue
GPIO Port S is disabled.0
Enable and provide a clock to GPIO Port S in Run mode.1
0RWR1616
GPIO Port R Run Mode Clock Gating Control
DescriptionValue
GPIO Port R is disabled.0
Enable and provide a clock to GPIO Port R in Run mode.1
0RWR1515
GPIO Port Q Run Mode Clock Gating Control
DescriptionValue
GPIO Port Q is disabled.0
Enable and provide a clock to GPIO Port Q in Run mode.1
0RWR1414
December 13, 2013398
Texas Instruments-Advance Information
System Control