Datasheet

External Peripheral Interface (EPI) ............................................................................................. 846
Register 1: EPI Configuration (EPICFG), offset 0x000 ....................................................................... 888
Register 2: EPI Main Baud Rate (EPIBAUD), offset 0x004 ................................................................. 890
Register 3: EPI Main Baud Rate (EPIBAUD2), offset 0x008 ............................................................... 892
Register 4: EPI SDRAM Configuration (EPISDRAMCFG), offset 0x010 .............................................. 894
Register 5: EPI Host-Bus 8 Configuration (EPIHB8CFG), offset 0x010 ............................................... 896
Register 6: EPI Host-Bus 16 Configuration (EPIHB16CFG), offset 0x010 ........................................... 901
Register 7: EPI General-Purpose Configuration (EPIGPCFG), offset 0x010 ........................................ 907
Register 8: EPI Host-Bus 8 Configuration 2 (EPIHB8CFG2), offset 0x014 .......................................... 910
Register 9: EPI Host-Bus 16 Configuration 2 (EPIHB16CFG2), offset 0x014 ....................................... 916
Register 10: EPI Address Map (EPIADDRMAP), offset 0x01C ............................................................. 923
Register 11: EPI Read Size 0 (EPIRSIZE0), offset 0x020 .................................................................... 926
Register 12: EPI Read Size 1 (EPIRSIZE1), offset 0x030 .................................................................... 926
Register 13: EPI Read Address 0 (EPIRADDR0), offset 0x024 ............................................................ 927
Register 14: EPI Read Address 1 (EPIRADDR1), offset 0x034 ............................................................ 927
Register 15: EPI Non-Blocking Read Data 0 (EPIRPSTD0), offset 0x028 ............................................. 928
Register 16: EPI Non-Blocking Read Data 1 (EPIRPSTD1), offset 0x038 ............................................. 928
Register 17: EPI Status (EPISTAT), offset 0x060 ................................................................................ 930
Register 18: EPI Read FIFO Count (EPIRFIFOCNT), offset 0x06C ...................................................... 932
Register 19: EPI Read FIFO (EPIREADFIFO0), offset 0x070 ............................................................... 933
Register 20: EPI Read FIFO Alias 1 (EPIREADFIFO1), offset 0x074 .................................................... 933
Register 21: EPI Read FIFO Alias 2 (EPIREADFIFO2), offset 0x078 .................................................... 933
Register 22: EPI Read FIFO Alias 3 (EPIREADFIFO3), offset 0x07C ................................................... 933
Register 23: EPI Read FIFO Alias 4 (EPIREADFIFO4), offset 0x080 .................................................... 933
Register 24: EPI Read FIFO Alias 5 (EPIREADFIFO5), offset 0x084 .................................................... 933
Register 25: EPI Read FIFO Alias 6 (EPIREADFIFO6), offset 0x088 .................................................... 933
Register 26: EPI Read FIFO Alias 7 (EPIREADFIFO7), offset 0x08C ................................................... 933
Register 27: EPI FIFO Level Selects (EPIFIFOLVL), offset 0x200 ........................................................ 934
Register 28: EPI Write FIFO Count (EPIWFIFOCNT), offset 0x204 ...................................................... 936
Register 29: EPI DMA Transmit Count (EPIDMATXCNT), offset 0x208 ................................................. 937
Register 30: EPI Interrupt Mask (EPIIM), offset 0x210 ......................................................................... 938
Register 31: EPI Raw Interrupt Status (EPIRIS), offset 0x214 .............................................................. 940
Register 32: EPI Masked Interrupt Status (EPIMIS), offset 0x218 ........................................................ 942
Register 33: EPI Error and Interrupt Status and Clear (EPIEISC), offset 0x21C .................................... 944
Register 34: EPI Host-Bus 8 Configuration 3 (EPIHB8CFG3), offset 0x308 .......................................... 946
Register 35: EPI Host-Bus 16 Configuration 3 (EPIHB16CFG3), offset 0x308 ....................................... 949
Register 36: EPI Host-Bus 8 Configuration 4 (EPIHB8CFG4), offset 0x30C .......................................... 953
Register 37: EPI Host-Bus 16 Configuration 4 (EPIHB16CFG4), offset 0x30C ...................................... 956
Register 38: EPI Host-Bus 8 Timing Extension (EPIHB8TIME), offset 0x310 ......................................... 960
Register 39: EPI Host-Bus 16 Timing Extension (EPIHB16TIME), offset 0x310 ..................................... 962
Register 40: EPI Host-Bus 8 Timing Extension (EPIHB8TIME2), offset 0x314 ....................................... 964
Register 41: EPI Host-Bus 16 Timing Extension (EPIHB16TIME2), offset 0x314 ................................... 966
Register 42: EPI Host-Bus 8 Timing Extension (EPIHB8TIME3), offset 0x318 ....................................... 968
Register 43: EPI Host-Bus 16 Timing Extension (EPIHB16TIME3), offset 0x318 ................................... 970
Register 44: EPI Host-Bus 8 Timing Extension (EPIHB8TIME4), offset 0x31C ...................................... 972
Register 45: EPI Host-Bus 16 Timing Extension (EPIHB16TIME4), offset 0x31C .................................. 974
Register 46: EPI Host-Bus PSRAM (EPIHBPSRAM), offset 0x360 ....................................................... 976
39December 13, 2013
Texas Instruments-Advance Information
Tiva
™
TM4C129XNCZAD Microcontroller