Datasheet

Register 31: DMA PrimeCell Identification 0 (DMAPCellID0), offset 0xFF0 ........................................... 767
Register 32: DMA PrimeCell Identification 1 (DMAPCellID1), offset 0xFF4 ........................................... 768
Register 33: DMA PrimeCell Identification 2 (DMAPCellID2), offset 0xFF8 ........................................... 769
Register 34: DMA PrimeCell Identification 3 (DMAPCellID3), offset 0xFFC ........................................... 770
General-Purpose Input/Outputs (GPIOs) ................................................................................... 771
Register 1: GPIO Data (GPIODATA), offset 0x000 ............................................................................ 790
Register 2: GPIO Direction (GPIODIR), offset 0x400 ......................................................................... 791
Register 3: GPIO Interrupt Sense (GPIOIS), offset 0x404 .................................................................. 792
Register 4: GPIO Interrupt Both Edges (GPIOIBE), offset 0x408 ........................................................ 793
Register 5: GPIO Interrupt Event (GPIOIEV), offset 0x40C ................................................................ 794
Register 6: GPIO Interrupt Mask (GPIOIM), offset 0x410 ................................................................... 795
Register 7: GPIO Raw Interrupt Status (GPIORIS), offset 0x414 ........................................................ 796
Register 8: GPIO Masked Interrupt Status (GPIOMIS), offset 0x418 ................................................... 798
Register 9: GPIO Interrupt Clear (GPIOICR), offset 0x41C ................................................................ 800
Register 10: GPIO Alternate Function Select (GPIOAFSEL), offset 0x420 ............................................ 801
Register 11: GPIO 2-mA Drive Select (GPIODR2R), offset 0x500 ........................................................ 803
Register 12: GPIO 4-mA Drive Select (GPIODR4R), offset 0x504 ........................................................ 804
Register 13: GPIO 8-mA Drive Select (GPIODR8R), offset 0x508 ........................................................ 805
Register 14: GPIO Open Drain Select (GPIOODR), offset 0x50C ......................................................... 806
Register 15: GPIO Pull-Up Select (GPIOPUR), offset 0x510 ................................................................ 807
Register 16: GPIO Pull-Down Select (GPIOPDR), offset 0x514 ........................................................... 809
Register 17: GPIO Slew Rate Control Select (GPIOSLR), offset 0x518 ................................................ 811
Register 18: GPIO Digital Enable (GPIODEN), offset 0x51C ................................................................ 812
Register 19: GPIO Lock (GPIOLOCK), offset 0x520 ............................................................................ 814
Register 20: GPIO Commit (GPIOCR), offset 0x524 ............................................................................ 815
Register 21: GPIO Analog Mode Select (GPIOAMSEL), offset 0x528 ................................................... 817
Register 22: GPIO Port Control (GPIOPCTL), offset 0x52C ................................................................. 818
Register 23: GPIO ADC Control (GPIOADCCTL), offset 0x530 ............................................................ 820
Register 24: GPIO DMA Control (GPIODMACTL), offset 0x534 ........................................................... 821
Register 25: GPIO Select Interrupt (GPIOSI), offset 0x538 .................................................................. 822
Register 26: GPIO 12-mA Drive Select (GPIODR12R), offset 0x53C .................................................... 823
Register 27: GPIO Wake Pin Enable (GPIOWAKEPEN), offset 0x540 .................................................. 824
Register 28: GPIO Wake Level (GPIOWAKELVL), offset 0x544 ........................................................... 826
Register 29: GPIO Wake Status (GPIOWAKESTAT), offset 0x548 ....................................................... 828
Register 30: GPIO Peripheral Property (GPIOPP), offset 0xFC0 .......................................................... 830
Register 31: GPIO Peripheral Configuration (GPIOPC), offset 0xFC4 ................................................... 831
Register 32: GPIO Peripheral Identification 4 (GPIOPeriphID4), offset 0xFD0 ....................................... 834
Register 33: GPIO Peripheral Identification 5 (GPIOPeriphID5), offset 0xFD4 ....................................... 835
Register 34: GPIO Peripheral Identification 6 (GPIOPeriphID6), offset 0xFD8 ....................................... 836
Register 35: GPIO Peripheral Identification 7 (GPIOPeriphID7), offset 0xFDC ...................................... 837
Register 36: GPIO Peripheral Identification 0 (GPIOPeriphID0), offset 0xFE0 ....................................... 838
Register 37: GPIO Peripheral Identification 1 (GPIOPeriphID1), offset 0xFE4 ....................................... 839
Register 38: GPIO Peripheral Identification 2 (GPIOPeriphID2), offset 0xFE8 ....................................... 840
Register 39: GPIO Peripheral Identification 3 (GPIOPeriphID3), offset 0xFEC ...................................... 841
Register 40: GPIO PrimeCell Identification 0 (GPIOPCellID0), offset 0xFF0 .......................................... 842
Register 41: GPIO PrimeCell Identification 1 (GPIOPCellID1), offset 0xFF4 .......................................... 843
Register 42: GPIO PrimeCell Identification 2 (GPIOPCellID2), offset 0xFF8 .......................................... 844
Register 43: GPIO PrimeCell Identification 3 (GPIOPCellID3), offset 0xFFC ......................................... 845
December 13, 201338
Texas Instruments-Advance Information
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