Datasheet

DescriptionResetTypeNameBit/Field
Deep Sleep Clock Divisor
This field specifies the system clock divisor value during deep sleep
mode. The clock source selected by DSOSCSRC is divided by DSSYSDIV
+ 1:
f
SYSCLK
=f
OSCCLK
/(DSSYSDIV + 1)
0x0RWDSSYSDIV9:0
December 13, 2013294
Texas Instruments-Advance Information
System Control