Datasheet

Table 26-10. SYSCLK to Pixel Clock (LCDCP) Frequency Conversion Table ........................... 1872
Table 26-11. LCD Alternate Signal Functions in LIDD Mode ................................................... 1875
Table 27-1. Analog Comparators Signals (212BGA) ............................................................. 1916
Table 27-2. Internal Reference Voltage and ACREFCTL Field Values ................................... 1918
Table 27-3. Analog Comparator Voltage Reference Characteristics, V
DDA
= 3.3V, EN= 1, and
RNG = 0 .......................................................................................................... 1919
Table 27-4. Analog Comparator Voltage Reference Characteristics, V
DDA
= 3.3V, EN= 1, and
RNG = 1 .......................................................................................................... 1920
Table 27-5. Analog Comparators Register Map ................................................................... 1921
Table 28-1. PWM Signals (212BGA) ................................................................................... 1934
Table 28-2. PWM Register Map .......................................................................................... 1941
Table 29-1. QEI Signals (212BGA) ..................................................................................... 2012
Table 29-2. QEI Register Map ............................................................................................ 2016
Table 31-1. GPIO Pins With Default Alternate Functions ...................................................... 2034
Table 31-2. Signals by Pin Number ..................................................................................... 2035
Table 31-3. Signals by Signal Name ................................................................................... 2054
Table 31-4. Signals by Function, Except for GPIO ............................................................... 2070
Table 31-5. GPIO Pins and Alternate Functions ................................................................... 2087
Table 31-6. Possible Pin Assignments for Alternate Functions .............................................. 2092
Table 31-7. Connections for Unused Signals (212-Ball BGA) ............................................... 2099
Table 32-1. Absolute Maximum Ratings .............................................................................. 2101
Table 32-2. ESD Absolute Maximum Ratings ...................................................................... 2101
Table 32-3. Temperature Characteristics ............................................................................. 2102
Table 32-4. 212 BGA Power Dissipation .............................................................................. 2102
Table 32-5. Thermal Characteristics ................................................................................... 2102
Table 32-6. Recommended DC Operating Conditions .......................................................... 2103
Table 32-7. Recommended FAST GPIO Pad Operating Conditions ...................................... 2103
Table 32-8. Recommended Slow GPIO Pad Operating Conditions ........................................ 2104
Table 32-9. GPIO Current Restrictions ................................................................................ 2104
Table 32-10. Maximum GPIO Package Side Assignments ..................................................... 2105
Table 32-11. Load Conditions ............................................................................................... 2105
Table 32-12. JTAG Characteristics ....................................................................................... 2106
Table 32-13. Power and Brown-Out Levels ........................................................................... 2107
Table 32-14. Reset Characteristics ....................................................................................... 2112
Table 32-15. LDO Regulator Characteristics ......................................................................... 2114
Table 32-16. Phase Locked Loop (PLL) Characteristics ......................................................... 2115
Table 32-17. System Divisor Factors for f
vco
=480 MHz ........................................................... 2116
Table 32-18. Actual PLL Frequency ...................................................................................... 2116
Table 32-19. PIOSC Clock Characteristics ............................................................................ 2117
Table 32-20. Low-Frequency Oscillator Characteristics .......................................................... 2117
Table 32-21. Hibernation Internal Low Frequency Oscillator Clock Characteristics ................... 2117
Table 32-22. Hibernation External Oscillator (XOSC) Input Characteristics .............................. 2118
Table 32-23. Main Oscillator Input Characteristics ................................................................. 2119
Table 32-24. Crystal Parameters .......................................................................................... 2120
Table 32-25. System Clock Characteristics with ADC Operation ............................................. 2122
Table 32-26. System Clock Characteristics with USB Operation ............................................. 2122
Table 32-27. Wake from Sleep Characteristics ...................................................................... 2122
Table 32-28. Wake from Deep Sleep Characteristics ............................................................. 2123
25December 13, 2013
Texas Instruments-Advance Information
Tiva
™
TM4C129XNCZAD Microcontroller