Datasheet

Figure 32-49. ULPI Interface Timing Diagram
USB0CLK
USB0STP
USB0Dn
Write
USB0DIR/
USB0NXT
USB0Dn
Read
U1
U2
U3
U4
U5
U6
32.21 LCD Controller
The LCD controller consists of two independent controllers, the raster controller and the LCD interface
display driver (LIDD) controller. Each controller operates independently from the other and only one
of them is active at any given time.
■ The LIDD controller supports an asynchronous LCD interface. It provides full-timing
programmability of control signals (CS, WE, OE, ALE) and output data. It also supports
synchronous interface in Motorola 6800 mode and Intel 8080 mode through the use of the external
LCDMCLK output.
■ The raster controller handles the synchronous LCD interface. It provides timing and data for
constant graphics refresh to a passive display. It supports a wide variety of monochrome and
full-color display types and sizes by use of programmable timing controls, a built-in palette, and
a gray-scale and serializer. Graphics data is processed and stored in frame buffers. A frame
buffer is a contiguous memory block in the system. The µDMA supplies the graphics data to the
raster engine which, in turn, outputs to the external LCD device.
The maximum resolution for the LCD controller is 2048 x 2048 pixels. The maximum frame rate is
determined by the image size in combination with the pixel clock rate.
The LCD signals must be configured with a drive strength of 8 mA with slew rate control.
Table 32-66. LCD Controller Load Capacitance Limits
UnitMaxNomMinConditionParameter NameParameter
pF50-5LIDD mode
LCD Output Load
Capacitance
C
LOAD
pF30-3Raster mode
Note: A 25-pF load is assumed for LCD timings.
2155December 13, 2013
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TM4C129XNCZAD Microcontroller