Datasheet
r. A low noise environment is assumed in order to obtain values close to spec. The board must have good ground isolation
between analog and digital grounds and a clean reference voltage. The input signal must be band-limited to Nyquist
bandwidth. No anti-aliasing filter is provided internally.
s. ADC dynamic characteristics are measured using low-noise board design, with low-noise reference voltage ( < -74dB
noise level in signal BW) and low-noise analog supply voltage. Board noise and ground bouncing couple into the ADC
and affect dynamic characteristics. Clean external reference must be used to achieve shown specs.
t. Differential signal with correct common mode, applied between two ADC inputs.
u. SDR = -THD in dB.
v. For higher frequency inputs, degradation in SDR should be expected.
w. SNDR = S/(N+D) = SINAD (in dB)
x. Effective number of bits (ENOB) can be calculated from SNDR: ENOB = (SNDR - 1.76) / 6.02.
y. Single ended inputs are more sensitive to board and trace noise than differential inputs; SNR and SNDR measurements
on single-ended inputs are highly dependent on how clean the test set-up is. If the input signal is not well-isolated on
the board, higher noise than specified could potentially be seen at the ADC output.
z. Note that this parameter does not include ADC error.
Table 32-45. ADC Electrical Characteristics for ADC at 2 Msps
ab
UnitMaxNomMinParameter NameParameter
POWER SUPPLY REQUIREMENTS
V3.633.32.97ADC supply voltageV
DDA
V-0-ADC ground voltageGNDA
VDDA / GNDA VOLTAGE REFERENCE
μF-1.0 // 0.01
c
-Voltage reference decoupling capacitanceC
REF
EXTERNAL VOLTAGE REFERENCE INPUT
VV
DDA
V
DDA
2.4Positive external voltage reference for ADC,
when VREF field in the ADCCTL register is 0x1
d
-
V
REFA+
V0.3GNDAGNDANegative external voltage reference for ADC,
when VREF field in the ADCCTL register is 0x1
d
V
REFA-
µA440330.5-Current on VREF+ input, using external V
REF+
= 3.3 V
I
VREF
µA2.0--DC leakage current on VREF+ input when
external VREF disabled
I
LVREF
μF-1.0 // 0.01
c
-External reference decoupling capacitance
d
C
REF
ANALOG INPUT
VV
DDA
-0Single-ended, full- scale analog input voltage,
internal reference
ef
V
ADCIN
VV
VDDA
--V
DDA
Differential, full-scale analog input voltage,
internal reference
eg
VV
REFA+
-V
REFA-
Single-ended, full-scale analog input voltage,
external reference
df
VV
REFA+
-
V
REFA-
-- (V
REFA+
-
V
REFA-
)
Differential, full-scale analog input voltage,
external reference
dh
mV(VREFP +
VREFN) / 2
± 25
--Input common mode voltage, differential mode
i
VIN
CM
µA2.0--ADC input leakage current
j
I
L
kΩ2.5--ADC equivalent input resistance
j
R
ADC
pF10--ADC equivalent input capacitance
j
C
ADC
Ωpending--Analog source resistance
j
R
S
2139December 13, 2013
Texas Instruments-Advance Information
Tiva
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TM4C129XNCZAD Microcontroller