Datasheet

Figure 32-19. SDRAM Read Timing
Row Column Data 0 Data 1 ... Data n
CLK
(EPI0S31)
CKE
(EPI0S30)
CSn
(EPI0S29)
WEn
(EPI0S28)
RASn
(EPI0S19)
CASn
(EPI0S18)
DQMH, DQML
(EPI0S [17:16])
AD [15:0]
(EPI0S [15:0])
Activate NOP Read
NOP
Burst
Term
AD [15:0] driven in
AD [15:0] driven out AD [15:0] driven out
E4
E5
E6
E7
E8
Figure 32-20. SDRAM Write Timing
Row
Column-1
Data 0 Data 1 ... Data n
CLK
(EPI0S31)
CKE
(EPI0S30)
CSn
(EPI0S29)
WEn
(EPI0S28)
RASn
(EPI0S19)
CASn
(EPI0S18)
DQMH, DQML
(EPI0S [17:16])
AD [15:0]
(EPI0S [15:0])
Activate NOP Write
Burst
Term
AD [15:0] driven out
AD [15:0] driven out
E4 E5
E6
Table 32-41. EPI Host-Bus 8 and Host-Bus 16 Interface Characteristics
UnitMaxNomMinParameter NameParameterParameter No
ns--10Read data set up timeT
ISU
E14
ns--0Read data hold timeT
IH
E15
ns3.6--WRn to write data validT
DV
E16
EPI Clocks--1Data hold from WRn invalidT
DI
E17
ns4--ALE/CSn to output validT
OV
E18
ns4--CSn to output invalidT
OINV
E19
EPI Clocks--1WRn / RDn strobe width lowT
STLOW
E20
EPI Clocks-1-ALE width highT
ALEHIGH
E21
EPI Clocks--2CSn width lowT
CSLOW
E22
2131December 13, 2013
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TM4C129XNCZAD Microcontroller