Datasheet

Table 32-32. Flash Memory Characteristics (continued)
UnitMaxNomMinParameter NameParameter
ms2510-Mass erase time, <1k cycles
T
ME
ms7020-Mass erase time, 10k cycles
ms2500300-Mass erase time, 100k cycles
a. A program/erase cycle is defined as switching the bits from 1-> 0 -> 1.
b. If programming fewer than 64 bits of data, the programming time is the same. For example, if only 32 bits of data need
to be programmed, the other 32 bits are masked off.
32.13 EEPROM
Table 32-33. EEPROM Characteristics
a
UnitMaxNomMinParameter NameParameter
cycles--500,000Number of mass program/erase cycles of a single word
c
EPE
CYC
b
years--20Data retention with 100% power-on hours at T
J
=85˚CET
RET
years--11Data retention with 10% power-on hours at T
J
=125˚C and
90% power-on hours at T
J
=100˚C
ET
RET_EXTEMP
μs600110-Program time for 32 bits of data with memory space available
ET
PROG
ms-30-Program time for 32 bits of data in which a copy to the copy
buffer is required, the copy buffer has space and less than
10% of EEPROM endurance used
ms900--Program time for 32 bits of data in which a copy to the copy
buffer is required, the copy buffer has space and greater than
90% of EEPROM endurance used
ms-60-Program time for 32 bits of data in which a copy of the copy
buffer is required, the copy buffer requires an erase and less
than 10% of EEPROM endurance used
ms1800--Program time for 32 bits of data a copy to the copy buffer is
required, the copy buffer requires an erase and greater than
90% of EEPROM endurance used
system clocks--Read access timeET
READ
ms158-Mass erase time, <1k cycles
ET
ME
ms4015-Mass erase time, 10k cycles
ms50075-Mass erase time, 100k cycles
ms2000
e
--EEPROM recovery Power-On Reset delay
d
ET
PORDLY
a. Because the EEPROM operates as a background task and does not prevent the CPU from executing from Flash memory,
the operation will complete within the maximum time specified provided the EEPROM operation is not stalled by a Flash
memory program or erase operation.
b. One word can be written more than 500K times, but these writes impact the endurance of the words in the meta-block
that the word is within. Different words can be written such that any or all words can be written more than 500K times
when write counts per word stay about the same. See the section called “Endurance” on page 649 for more information.
c. A program/erase cycle is defined as switching the bits from 1-> 0 -> 1.
d. This parameter applies only in situations where a power-down or brown-out event occurs during an EEPROM program
or erase operation. For all other sequences, there is no impact to normal Power-On Reset (POR) timing. This delay is
in addition to other POR delays.
e. The maximum Power-On Reset delay increases as the EEPROM memory ages towards its endurance limit.
2125December 13, 2013
Texas Instruments-Advance Information
Tiva
™
TM4C129XNCZAD Microcontroller