Datasheet

Table 32-30. Hibernation Module Characteristics (continued)
UnitMaxNomMinParameter NameParameterParameter
No
%60-40Duty cycle for RTCCLK output signal, when
using a 32.768-kHz crystal
DC
RTCCLK
H5
%70-30Duty cycle for RTCCLK output signal, when
using a 32.768-kHz external single-ended
(bypass) clock source
Table 32-31. Hibernation Module Tamper I/O Characteristics
UnitMaxNominalMinParameter NameParameter
MΩ-4.4-TMPRn pull-up resistorR
TPU
µs--62TMPRn pulse width with short glitch filterT
SP
ms--94TMPRn pulse width with long glitch filterT
LP
µs95--TMPRn assertion to NMI (short glitch filter)T
NMIS
ms94--TMPRn assertion to NMI (long glitch filter)T
NMIL
V--V
BAT
*0.8TMPRn high-level input voltage when operating
from VBAT
V
IH
Figure 32-15. Hibernation Module Timing
HIB
WAKE
V
DD
POR
H2
H3
H4
H1
32.12 Flash Memory
Table 32-32. Flash Memory Characteristics
UnitMaxNomMinParameter NameParameter
cycles--100,000Number of program/erase cycles
a
PE
CYC
years--20Data retention with 100% power-on hours at
T
J
=85˚C
T
RET
years--11Data retention with 10% power-on hours at
T
J
=125˚C and 90% power-on hours at T
J
=100˚C
T
RET_EXTEMP
µs3005030Program time for double-word-aligned (64 bits) data
b
T
PROG64
ms158-Page erase time, <1k cycles
T
ERASE
ms4015-Page erase time, 10k cycles
ms50075-Page erase time, 100k cycles
December 13, 20132124
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Electrical Characteristics