Datasheet

Table 31-3. Signals by Signal Name (continued)
DescriptionBuffer TypePin TypePin Mux / Pin
Assignment
Pin NumberPin Name
LCD Data Pin 21 output.TTLOPS1 (15)D13LCDDATA21
LCD Data Pin 22 output.TTLOPS2 (15)B14LCDDATA22
LCD Data Pin 23 output.TTLOPS3 (15)A14LCDDATA23
LCD Frame Clock or VSYNC in Raster mode;
Address Latch Enable in LIDD mode
TTLOPR1 (15)N4LCDFP
LCD Line Clock or HSYNC in Raster mode; Write
Strobe or Direction bit in LIDD mode
TTLOPR2 (15)N2LCDLP
LCD Memory Clock/Secondary chip Select
(CS1)/Secondary Enable (E1) in LIDD
Synchronous/Async MPU/Hitachi mode
TTLOPF6 (15)T8LCDMCLK
Motion Control Module 0 PWM Fault 0.TTLIPF4 (6)
PS0 (6)
V7
D12
M0FAULT0
Motion Control Module 0 PWM Fault 1.TTLIPK6 (6)
PS1 (6)
V16
D13
M0FAULT1
Motion Control Module 0 PWM Fault 2.TTLIPK7 (6)
PS2 (6)
W16
B14
M0FAULT2
Motion Control Module 0 PWM Fault 3.TTLIPL0 (6)
PS3 (6)
G16
A14
M0FAULT3
Motion Control Module 0 PWM 0. This signal is
controlled by Module 0 PWM Generator 0.
TTLOPF0 (6)
PR0 (6)
U6
N5
M0PWM0
Motion Control Module 0 PWM 1. This signal is
controlled by Module 0 PWM Generator 0.
TTLOPF1 (6)
PR1 (6)
V6
N4
M0PWM1
Motion Control Module 0 PWM 2. This signal is
controlled by Module 0 PWM Generator 1.
TTLOPF2 (6)
PR2 (6)
W6
N2
M0PWM2
Motion Control Module 0 PWM 3. This signal is
controlled by Module 0 PWM Generator 1.
TTLOPF3 (6)
PR3 (6)
T7
V8
M0PWM3
Motion Control Module 0 PWM 4. This signal is
controlled by Module 0 PWM Generator 2.
TTLOPG0 (6)
PR4 (6)
N15
P3
M0PWM4
Motion Control Module 0 PWM 5. This signal is
controlled by Module 0 PWM Generator 2.
TTLOPG1 (6)
PR5 (6)
T14
P2
M0PWM5
Motion Control Module 0 PWM 6. This signal is
controlled by Module 0 PWM Generator 3.
TTLOPK4 (6)
PR6 (6)
U19
W9
M0PWM6
Motion Control Module 0 PWM 7. This signal is
controlled by Module 0 PWM Generator 3.
TTLOPK5 (6)
PR7 (6)
V17
R10
M0PWM7
No connect. Leave the pin electrically
unconnected/isolated.
--fixedC5
V18
V19
W18
W19
E13
NC
Non-maskable interrupt.TTLIPD7 (8)
PE7 (8)
B2
B7
NMI
Main oscillator crystal input or an external clock
reference input.
AnalogIfixedE19OSC0
Main oscillator crystal output. Leave unconnected
when using a single-ended clock source.
AnalogOfixedD19OSC1
1-Wire Optional 2nd signal to be used as output.TTLI/OPG5 (5)
PP5 (4)
K15
B12
OWALT
December 13, 20132060
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