Datasheet

31 Signal Tables
The following tables list the signals available for each pin. Signals are configured as GPIOs on reset,
except for those noted below. Use the GPIOAMSEL register (see page 817) to select analog mode.
For a GPIO pin to be used for an alternate digital function, the corresponding bit in the GPIOAFSEL
register (see page 801) must be set. Further pin muxing options are provided through the PMCx bit
field in the GPIOPCTL register (see page 818), which selects one of several available peripheral
functions for that GPIO.
Important: All GPIO pins are configured as GPIOs by default with the exception of the pins shown
in the table below. A Power-On-Reset (POR) or asserting RST puts the pins back to their
default state.
Table 31-1. GPIO Pins With Default Alternate Functions
GPIOPCTL PMCx Bit FieldGPIOAFSEL BitDefault StateGPIO Pin
0x10UART0PA[1:0]
0x10SSI0PA[5:2]
0x10I
2
C0PB[3:2]
0x31JTAG/SWDPC[3:0]
Table 31-2 on page 2035 shows the pin-to-signal-name mapping, including functional characteristics
of the signals. Each possible alternate analog and digital function is listed for each pin.
Table 31-3 on page 2054 lists the signals in alphabetical order by signal name. If it is possible for a
signal to be on multiple pins, each possible pin assignment is listed. The "Pin Mux" column indicates
the GPIO and the encoding needed in the PMCx bit field in the GPIOPCTL register.
Table 31-4 on page 2070 groups the signals by functionality, except for GPIOs. If it is possible for a
signal to be on multiple pins, each possible pin assignment is listed.
Table 31-5 on page 2087 lists the GPIO pins and their analog and digital alternate functions. The AINx
analog signals are not 5-V tolerant and go through an isolation circuit before reaching their circuitry.
These signals are configured by clearing the corresponding DEN bit in the GPIO Digital Enable
(GPIODEN) register and setting the corresponding AMSEL bit in the GPIO Analog Mode Select
(GPIOAMSEL) register. Other analog signals are 3.3-V tolerant and are connected directly to their
circuitry (C0-, C0+, C1-, C1+, C2-, C2+, USB0VBUS, USB0ID). These signals are configured by
clearing the DEN bit in the GPIO Digital Enable (GPIODEN) register. The digital signals are enabled
by setting the appropriate bit in the GPIO Alternate Function Select (GPIOAFSEL) and GPIODEN
registers and configuring the PMCx bit field in the GPIO Port Control (GPIOPCTL) register to the
numeric enoding shown in the table below. Table entries that are shaded gray are the default values
for the corresponding GPIO pin.
Table 31-6 on page 2092 lists the signals based on number of possible pin assignments. This table
can be used to plan how to configure the pins for a particular functionality. Application Note AN01274
Configuring Tiva™ C Series Microcontrollers with Pin Multiplexing provides an overview of the pin
muxing implementation, an explanation of how a system designer defines a pin configuration, and
examples of the pin configuration process.
Note: All digital inputs are Schmitt triggered.
December 13, 20132034
Texas Instruments-Advance Information
Signal Tables