Datasheet

DescriptionResetTypeNameBit/Field
Digital Comparator 2 Trigger
If the PWMnCTL register LATCH bit is clear, this bit represents the
current state of the Digital Comparator 2 trigger input.
If the PWMnCTL register LATCH bit is set, this bit represents a sticky
version of the trigger.
■ If DCMP2 is set, the trigger transitioned to the active state previously.
■ If DCMP2 is clear, the trigger has not transitioned to the active state
since the last time it was cleared.
■ The DCMP2 bit is cleared by writing it with the value 1.
0-DCMP22
Digital Comparator 1 Trigger
If the PWMnCTL register LATCH bit is clear, this bit represents the
current state of the Digital Comparator 1 trigger input.
If the PWMnCTL register LATCH bit is set, this bit represents a sticky
version of the trigger.
■ If DCMP1 is set, the trigger transitioned to the active state previously.
■ If DCMP1 is clear, the trigger has not transitioned to the active state
since the last time it was cleared.
■ The DCMP1 bit is cleared by writing it with the value 1.
0-DCMP11
Digital Comparator 0 Trigger
If the PWMnCTL register LATCH bit is clear, this bit represents the
current state of the Digital Comparator 0 trigger input.
If the PWMnCTL register LATCH bit is set, this bit represents a sticky
version of the trigger.
■ If DCMP0 is set, the trigger transitioned to the active state previously.
■ If DCMP0 is clear, the trigger has not transitioned to the active state
since the last time it was cleared.
■ The DCMP0 bit is cleared by writing it with the value 1.
0-DCMP00
December 13, 20132006
Texas Instruments-Advance Information
Pulse Width Modulator (PWM)