Datasheet

Write the PWM0LOAD register with a value of 0x0000.018F.
8. Set the pulse width of the MnPWM0 pin for a 25% duty cycle.
Write the PWM0CMPA register with a value of 0x0000.012B.
9. Set the pulse width of the MnPWM1 pin for a 75% duty cycle.
Write the PWM0CMPB register with a value of 0x0000.0063.
10. Start the timers in PWM generator 0.
Write the PWM0CTL register with a value of 0x0000.0001.
11. Enable PWM outputs.
Write the PWMENABLE register with a value of 0x0000.0003.
28.5 Register Map
Table 28-2 on page 1941 lists the PWM registers. The offset listed is a hexadecimal increment to the
register's address, relative to the PWM module's base address:
PWM0: 0x4002.8000
Note that the PWM module clock must be enabled before the registers can be programmed. There
must be a delay of 3 system clocks after the PWM module clock is enabled before any PWM module
registers are accessed.
Table 28-2. PWM Register Map
See
page
DescriptionResetTypeNameOffset
1945PWM Master Control0x0000.0000RWPWMCTL0x000
1947PWM Time Base Sync0x0000.0000RWPWMSYNC0x004
1948PWM Output Enable0x0000.0000RWPWMENABLE0x008
1950PWM Output Inversion0x0000.0000RWPWMINVERT0x00C
1952PWM Output Fault0x0000.0000RWPWMFAULT0x010
1954PWM Interrupt Enable0x0000.0000RWPWMINTEN0x014
1956PWM Raw Interrupt Status0x0000.0000ROPWMRIS0x018
1959PWM Interrupt Status and Clear0x0000.0000RW1CPWMISC0x01C
1962PWM Status0x0000.0000ROPWMSTATUS0x020
1964PWM Fault Condition Value0x0000.0000RWPWMFAULTVAL0x024
1966PWM Enable Update0x0000.0000RWPWMENUPD0x028
1970PWM0 Control0x0000.0000RWPWM0CTL0x040
1975PWM0 Interrupt and Trigger Enable0x0000.0000RWPWM0INTEN0x044
1978PWM0 Raw Interrupt Status0x0000.0000ROPWM0RIS0x048
1941December 13, 2013
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TM4C129XNCZAD Microcontroller