Datasheet

27.5 Register Map
Table 27-5 on page 1921 lists the comparator registers. The offset listed is a hexadecimal increment
to the register's address, relative to the Analog Comparator base address of 0x4003.C000. Note
that the analog comparator clock must be enabled before the registers can be programmed (see
page 413). There must be a delay of 3 system clocks after the analog comparator module clock is
enabled before any analog comparator module registers are accessed.
Table 27-5. Analog Comparators Register Map
See
page
DescriptionResetTypeNameOffset
1922Analog Comparator Masked Interrupt Status0x0000.0000RW1CACMIS0x000
1923Analog Comparator Raw Interrupt Status0x0000.0000ROACRIS0x004
1924Analog Comparator Interrupt Enable0x0000.0000RWACINTEN0x008
1925Analog Comparator Reference Voltage Control0x0000.0000RWACREFCTL0x010
1926Analog Comparator Status 00x0000.0000ROACSTAT00x020
1927Analog Comparator Control 00x0000.0000RWACCTL00x024
1926Analog Comparator Status 10x0000.0000ROACSTAT10x040
1927Analog Comparator Control 10x0000.0000RWACCTL10x044
1926Analog Comparator Status 20x0000.0000ROACSTAT20x060
1927Analog Comparator Control 20x0000.0000RWACCTL20x064
1929Analog Comparator Peripheral Properties0x0007.0007ROACMPPP0xFC0
27.6 Register Descriptions
The remainder of this section lists and describes the Analog Comparator registers, in numerical
order by address offset.
1921December 13, 2013
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