Datasheet

Register 22: LCD Interrupt Raw Status and Set Register (LCDRISSET), offset
0x058
This register contains the raw interrupt status. In addition to providing the Raw Interrupt Status on
a read, a 1 to a bit will set the associated interrupt.
LCD Interrupt Raw Status and Set Register (LCDRISSET)
Base 0x4405.0000
Offset 0x058
Type RW, reset 0x0000.0000
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
DONE
RRASTRDONE
SYNCSACBSreservedFIFOUPALLOADreservedEOF0EOF1reserved
RWRWRWRWRORWRWRORWRWROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0000.00ROreserved31:10
DMA End-of-Frame 1 Raw Interrupt Status and Set
Writing 1 will set status. Writing 0 has no effect. Read indicates raw
status
DescriptionValue
Inactive0
Active1
0RWEOF19
DMA End-of-Frame 0 Raw Interrupt Status and Set
Writing 1 will set status. Writing 0 has no effect. Read indicates raw
status
DescriptionValue
Inactive0
Active1
0RWEOF08
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved7
DMA Palette Loaded Raw Interrupt Status and Set
Writing 1 will set status. Writing 0 has no effect. Read indicates raw
status
DescriptionValue
Inactive0
Active1
0RWPALLOAD6
1901December 13, 2013
Texas Instruments-Advance Information
Tiva
™
TM4C129XNCZAD Microcontroller