Datasheet

Register 3: LCD LIDD Control (LCDLIDDCTL), offset 0x00C
This register configures the functionality of the LCD controller interface when it is programmed to
function in LIDD mode.
LCD LIDD Control (LCDLIDDCTL)
Base 0x4405.0000
Offset 0x00C
Type RW, reset 0x0000.0000
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
MODEALERDEN
WRDIRINV
CS0E0CS1E1DMAENDMACSreserved
RWRWRWRWRWRWRWRWRWRWROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0000.00ROreserved31:10
CS0/CS1 Select for LIDD DMA Writes
DescriptionValue
DMA writes to LIDD CS0 (LCDAC).0
DMA writes to LIDD CS1 (LCDMCLK).1
Note: In Motorola 6800 or Intel 8080 synchronous modes, CS1 is
not used and thus, DMACS should not be set to 0x1.
0RWDMACS9
LIDD DMA Enable
DescriptionValue
Deactivate DMA control of LIDD interface.
DMA control is released upon completion of transfer of the
current frame of data (LIDD Frame Done) when this bit is clear.
The microcontroller has direct read/write access to the panel in
this mode.
0
Activate DMA to drive LIDD interface to support streaming data
to smart panels.
The microcontroller cannot access the panel directly in this
mode.
1
0RWDMAEN8
Chip Select 1 (CS1)/Enable 1(E1) Polarity Control
CS1 is active low by default. EN1 is active high by default.
DescriptionValue
CS1/E1 (LCDMCLK) are not inverted. CS1 remains active low
and E1 remains active high.
0
Invert CS1/E1 (LCDMCLK). CS1 is active high and E1 is active
low.
1
0RWCS1E17
1873December 13, 2013
Texas Instruments-Advance Information
Tiva
™
TM4C129XNCZAD Microcontroller