Datasheet

Table 26-9. LCD Register Map (continued)
See
page
DescriptionResetTypeNameOffset
1882LCD Raster Control0x0000.0000RWLCDRASTRCTL0x028
1886LCD Raster Timing 00x0000.0000RWLCDRASTRTIM00x02C
1887LCD Raster Timing 10x0000.0000RWLCDRASTRTIM10x030
1888LCD Raster Timing 20x0000.0000RWLCDRASTRTIM20x034
1891LCD Raster Subpanel Display 10x0000.0000RWLCDRASTRSUBP10x038
1892LCD Raster Subpanel Display 20x0000.0000RWLCDRASTRSUBP20x03C
1893LCD DMA Control0x0000.0000RWLCDDMACTL0x040
1895LCD DMA Frame Buffer 0 Base Address0x0000.0000RWLCDDMABAFB00x044
1896LCD DMA Frame Buffer 0 Ceiling Address0x0000.0000RWLCDDMACAFB00x048
1897LCD DMA Frame Buffer 1 Base Address0x0000.0000RWLCDDMABAFB10x04C
1898LCD DMA Frame Buffer 1 Ceiling Address0x0000.0000RWLCDDMACAFB10x050
1899LCD System Configuration Register0x0000.0028RWLCDSYSCFG0x054
1901LCD Interrupt Raw Status and Set Register0x0000.0000RWLCDRISSET0x058
1904LCD Interrupt Status and Clear0x0000.0000RWLCDMISCLR0x05C
1907LCD Interrupt Mask0x0000.0000RWLCDIM0x060
1910LCD Interrupt Enable Clear0x0000.0000RWLCDIENC0x064
1913LCD Clock Enable0x0000.0000RWLCDCLKEN0x06C
1914LCD Clock Resets0x0000.0000RWLCDCLKRESET0x070
26.8 Register Descriptions
Following is a description of the individual registers of the LCD controller.
1869December 13, 2013
Texas Instruments-Advance Information
Tiva
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TM4C129XNCZAD Microcontroller