Datasheet

Register 92: Ethernet PHY BIST Control - MR22 (EPHYBISTCR), address 0x016
This register is used for Build-In Self Test (BIST) configuration. The BIST functionality provides
Pseudo Random Bit Stream (PRBS) mechanism including packet generation generator and checker.
Selection of the exact loopback point in the signal chain is also done in this register.
Ethernet PHY BIST Control - MR22 (EPHYBISTCR)
Base n/a
Address 0x016
Type RW, reset 0x0100
0123456789101112131415
LBMODEreservedTXMIILBreservedPWRMODE
PKTGENSTAT
PRBSCHKSYNC
PRBSCHKLK
PKTENPRBSPKTPRBSMreserved
RWRWRWRWRWRORORORORORORORWRWRWROType
0000000010000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved15
PRBS Single/Continuous Mode
DescriptionValue
Single mode selected. When BIST Error Counter reaches its
max value, the PRBS checker stops counting.
0
Continuous mode selected. When the PRBS counters reach
maximum count value, the counter starts counting from zero
again.
1
0RWPRBSM14
Generated PRBS Packets
DescriptionValue
When packet generator is enabled, generate a single packet
with constant data. PRBS generation and check is disabled.
0
When packet generator is enabled, generate continuous packets
with PRBS data. When packet generator is disabled, PRBS
checker is still enabled.
1
0RWPRBSPKT13
Packet Generation Enable
DescriptionValue
Disable packet generator0
Enable packet generation with PRBS data1
0RWPKTEN12
PRBS Checker Lock Indication
DescriptionValue
PRBS checker is not locked0
PRBS checker is locked and synchronized on received bit
stream
1
0ROPRBSCHKLK11
December 13, 20131824
Texas Instruments-Advance Information
Ethernet Controller