Datasheet

Register 86: Ethernet PHY Status - MR16 (EPHYSTS), address 0x010
This register provides quick access to commonly accessed PHY control status and general
information.
Ethernet PHY Status - MR16 (EPHYSTS)
Base n/a
Address 0x010
Type RO, reset 0x0002
0123456789101112131415
LINKSPEEDDUPLEXMIILBANSJDRFMIIREQPAGERXDLSDFCSLPOLSTATRXLERRMDIXMreserved
ROROROROROROROROROROROROROROROROType
0100000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved15
MDI-X Mode
This is a read-only status as reported by the Auto-Negation state
machine:
This bit is affected by the settings of the MDIXEN and FORCEMDIX bits
in the EPHYCTL register. When MDIX is enabled, but not forced, this
bit updates dynamically as the Auto-MDIX algorithm swaps between
MDI and MDI-X configurations.
DescriptionValue
MDI pairs normal (Receive on TPRD pair, Transmit on TPTD
pair)
0
MDI pairs swapped (Receive on TPTD pair, Transmit on TPRD
pair)
1
0ROMDIXM14
Receive Error Latch
DescriptionValue
No receive error event has occurred.0
Receive error event has occurred since last read of
EPHYRXERCNT register (PHY offset 0x015).
1
This bit is cleared on a read of the EPHYRXERCNT register.
0RORXLERR13
Polarity Status
DescriptionValue
Correct Polarity detected.0
Inverted Polarity detected.1
This bit is a duplication of bit 4 (POLSTAT) in the EPHY10BTSC register
(PHY offset 0x01A). This bit is cleared upon a read of the EPHY10BTSC
register, but not on a read of the EPHYSTS register.
0ROPOLSTAT12
December 13, 20131810
Texas Instruments-Advance Information
Ethernet Controller