Datasheet

Register 69: Ethernet PHY Raw Interrupt Status (EPHYRIS), offset 0xFD0
The Ethernet PHY Raw Interrupt Status (EPHYRIS) register is used to mask the interrupt from
the Ethernet PHY, which is either from the internal integrated PHY or an external PHY.
Ethernet PHY Raw Interrupt Status (EPHYRIS)
Base 0x400E.C000
Offset 0xFD0
Type RO, reset 0x0000.0000
16171819202122232425262728293031
reserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
0123456789101112131415
INTreserved
ROROROROROROROROROROROROROROROROType
0000000000000000Reset
DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved31:1
Ethernet PHY Raw Interrupt Status
DescriptionValue
No interrupt has triggered.0
The Ethernet PHY has signaled an interrupt using the EN0INTR
input.
1
0ROINT0
1781December 13, 2013
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TM4C129XNCZAD Microcontroller