Datasheet

DescriptionResetTypeNameBit/Field
EN0PPS Output Frequency Control (PPSCTRL) or Command Control
(PPSCMD)
This bit field has two different functions depending on how the PPSEN0
bit is set.
If the PPSEN0 bit is set to 0x0, this field functions as a PPS0 output
frequency control (PPSCTRL), which controls the frequency of the output
signal, EN0PPS. The default value of this field is 0x0 and the PPS output
is one pulse every second.
If the PPSEN0 bit is 0x1, this field functions as a flexible output command
control for the EN0PPS signal. Programming the PPSCTRL bit field with
a non-zero value instructs the MAC to initiate an event. When the
command is transferred or synchronized to the PTP clock domain, these
bits are cleared automatically. Software should ensure that these bits
are programmed only when they are "all-zeros."
DescriptionValue
When the PPSEN0 bit = 0x0, the EN0PPS signal is 1 pulse of
the PTP reference clock. every second.
0x0
When the PPSEN0 bit = 0x1, this encoding indicates no
command.
When the PPSEN0 bit = 0x0, the binary rollover is 2 Hz, and
the digital rollover is 1 Hz.
0x1
When the PPSEN0 bit = 0x1, START single pulse. This command
generates a single pulse rising at the start point defined in the
Ethernet MAC Target Time Second/Nanoseconds
(EMACTARGX) registers (MAC offsets 0x71C and 0x720) and
a duration defined in the Ethernet MAC PPS0 Width
(EMACPPS0WIDTH) register (offset 0x764).
When the PPSEN0 bit = 0x0, the binary rollover is 4 Hz, and the
digital rollover is 2 Hz.
0x2
When the PPSEN0 bit = 0x1, START pulse train. This command
generates the train of pulses rising at the start point defined in
the Ethernet MAC Target Time Second/Nanoseconds
(EMACTARGX) registers (MAC offsets 0x71C and 0x720) and
repeated at an interval defined in the Ethernet MAC PPS0
Width (EMACPPS0WIDTH) register (offset 0x764). By default,
the EN0PPS pulse train is free-running unless stopped by STOP
pulse train at a time or STOP pulse train immediately command.
When thePPSEN0 bit = 0x0, the binary rollover is 8 Hz, and the
digital rollover is 4 Hz,
0x3
When the PPSEN0 bit = 0x1, cancel START. This command
cancels the START single pulse and START pulse train
commands if the system time has not crossed the programmed
start time.
When thePPSEN0 bit = 0x0, the binary rollover is 16 Hz, and
the digital rollover is 8 Hz.
0x4
When the PPSEN0 bit = 0x1, STOP pulse train at time. This
command stops the train of puses initiated by the START pulse
train command after the time programmed in the Ethernet MAC
Target Time Second/Nanoseconds (EMACTARGX) registers
(MAC offsets 0x71C and 0x720).
When thePPSEN0 bit = 0x0, the binary rollover is 32 Hz, and
the digital rollover is 16 Hz.
0x5
When the PPSEN0 bit = 0x1, STOP pulse train immediately.
December 13, 20131742
Texas Instruments-Advance Information
Ethernet Controller