Datasheet

DescriptionResetTypeNameBit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0ROreserved4:1
MMC Receive Good Bad Frame Counter Interrupt Mask
DescriptionValue
An interrupt is sent to the interrupt controller when the GBF bit
in the EMACMMCRXRIS register is set.
0
The GBF interrupt is suppressed and not sent to the interrupt
controller.
1
0x0RWGBF0
December 13, 20131712
Texas Instruments-Advance Information
Ethernet Controller