Datasheet

recommended. The Pulse HX1188 transformer has been tested and is known to successfully interface
to the Ethernet PHY.
Note: If the PHY is not to be used, then the EN0RXIN/EN0TX0N EN0RXIP/EN0TX0P pair should
be left unconnected and the RBIAS pin should be unconnected as well.
Note: When entering hibernation in VDD3ON mode, the supply rails to the Ethernet resistors R1,
R2, R3, R4 found in Figure 24-16 on page 1655 must be switched off.
24.5.3.2 Functional Configuration and Initialization
After reset, when the EMAC is powered and enabled, the EMACPC default register reset value is
sampled and used to configure the PHY. The results of this configuration can also be read in the
following EPHY registers:
■ EPHYBMCR register (MR0)
■ EPHYCFG1 register (MR9)
■ EPHYCFG2 register (MR10)
■ EPHYCFG3 register (MR11)
■ EPHYCTL register (MR25)
The mappings of the EMACPC register bits to the PHY register and bits are as follows:
Table 24-35. EMACPC to PHY Register Mapping
Corresponding PHY Bit (Bit No.)Corresponding PHY RegisterEMACPC Register Bit
N/AN/APHYEXT
N/AN/ADIGRESTART
ODDNDETDIS (1)EPHYCFG2NIBDETDIS
RXERRIDLE (2)EPHYCFG2RXERIDLE
ISOMILL (3)EPHYCFG2ISOMILL
LLR (7)EPHYCFG1LRR
TDRAR (8)EPHYCFG1TDRRUN
FLDWNM (4:0)EPHYCFG3FASTLDMODE
POLSWAP (7)EPHYCFG3POLSWAP
MDIMDIXS (6)EPHYCFG3MDISWAP
RAMDIX (5)EPHYCFG1RBSTMDIX
FAMDIX (6)EPHYCFG1FASTMDIX
AUTOMDI (15)EPHYCTLMDIXEN
FRXDVDET (1)EPHYCFG1FASTRXDV
FLUPPD (6)EPHYCFG2FASTLUPD
EXTFD (5)EPHYCFG2EXTFD
FASTANEN (4)EPHYCFG1FASTANEN
FANSEL (3:2)EPHYCFG1FASTANSEL
ANENEPHYBMCRANEN
N/AN/AANMODE
N/AN/APHYHOLD
December 13, 20131656
Texas Instruments-Advance Information
Ethernet Controller