Datasheet

10. Check the MIIB bit in the EMACMIIADDR register to identify if the MII interface is busy. When
the MIIB bit is 0, the MII interface is available to write to the PHY registers.
11. The EMACMIIDATA register should be programmed with the data to be written to the
EPHYADDAR register which is transferred to the previously selected extended PHY register.
12. Initiate write by writing the EMACMIIADDR register fields:
■ PLA: Physical Layer Address of the PHY. The integrated PHY's address is 0x0. The values
0x1 to 0x1F are available for external PHYs.
■ MII: Address of the PHY register to be written. In this case, it should be the address of the
EPHYADDAR register, 0xD.
■ CR: Clock Reference for the MDIO interface.
■ MIIW: Write Initiation. This bit is set to 1 to indicate that a write operation is to be executed.
■ MIIB: MII Busy. This bit is set to 1 to indicate that the MII is now busy with a write operation.
The EMAC clears this bit when the write has been transmitted.
Read from PHY Registers
The following describes the steps to read from an extended PHY register.
1. Check the MIIB bit in the EMACMIIADDR register to identify if the MII interface is busy. When
the MIIB bit is 0, the MII interface is available to read to the PHY registers.
2. Initiate the read by writing the EMACMIIADDR register fields:
■ PLA: Physical Layer Address of the PHY. The integrated PHY's address is 0x0. The values
0x1 to 0x1F are available for external PHYs.
■ MII: Register address of PHY register to be written.
■ CR: Clock Reference for the MDIO interface.
■ MIIW: Write/Read Initiation. This bit is programmed to a 0 to indicate that a read operation
is to be executed.
■ MIIB: MII Busy. This bit is set to 1 to indicate that the MII is now busy with a read operation.
The EMAC clears this bit when the write has been transmitted.
3. Wait for the MII interface to complete the read by polling the MIIB bit.
4. When the MIIB is clear, read the contents of the EMACMIIDATA register.
Read from Extended PHY Registers
The following describes the steps to read from an extended PHY register.
1. Check the MIIB bit in the EMACMIIADDR register to identify if the MII interface is busy. When
the MIIB bit is 0, the MII interface is available to read to the PHY registers.
2. Initiate the read by writing the EMACMIIADDR register fields:
December 13, 20131654
Texas Instruments-Advance Information
Ethernet Controller