Datasheet

1. Write to the Ethernet MAC DMA Bus Mode (EMACDMABUSMOD) register to set Host bus
parameters.
2. Write to the Ethernet MAC DMA Interrupt Mask Register (EMACDMAIM) register to mask
unnecessary interrupt causes.
3. Create the transmit and receive descriptor lists and then write to the Ethernet MAC Receive
Descriptor List Address (EMACRXDLADDR) register and the Ethernet MAC Transmit
Descriptor List Address (EMACTXDLADDR) register providing the DMA with the starting
address of each list.
4. Write to the Ethernet MAC Frame Filter (EMACFRAMEFLTR) register, the Ethernet MAC
Hash Table High (EMACHASHTBLH) and the Ethernet MAC Hash Table Low
(EMACHASHTBLL) for desired filtering options.
5. Write to the Ethernet MAC Configuration Register (EMACCFG) to configure the operating
mode and enable the transmit operation.
6. Program Bit 15 (PS) and Bit 11 (DM) of the EMACCFG register based on the line status received
or read from the PHY status register after auto-negotiation.
7. Write to the Ethernet MAC DMA Operation Mode (EMACDMAOPMODE) register to set Bits
13 and 1 to start transmission and reception.
8. Write to the EMACCFG register to enable the receive operation.
The Transmit and Receive engines enter the Running state and attempt to acquire descriptors
from the respective descriptor lists. The Receive and Transmit engines then begin processing
Receive and Transmit operations. The Transmit and Receive processes are independent of
each other and can be started or stopped separately.
24.5 Ethernet PHY
The integrated PHY supports 10Base-T and 100Base-TX signaling. It integrates all the physical-layer
functions needed to transmit and receive data on standard twisted-pair cables. The PHY directly
interfaces to the integrated Media Access Controller (MAC).
The Ethernet PHY uses mixed-signal processing to perform equalization, data recovery, and error
correction to achieve robust operation over CAT5 twisted-pair wiring. It not only meets the
requirements of IEEE 802.3, but maintains high margins in terms of alien cross-talk. The following
highlights the features of the PHY module:
■ Cable Diagnostics
■ Programmable Fast Link Down Modes
■ Auto-MDIX for 10/100Mbs
■ Energy Detection Mode
■ Serial Management Interface
■ IEEE 802.3u Auto-Negotiation and Parallel Detection
■ IEEE 802.3u ENDEC, 10Base-T Transceivers and Filters
December 13, 20131648
Texas Instruments-Advance Information
Ethernet Controller